intel/isl: Use genx_bits.h instead of a hand-rolled table

This gets rid of one piece of ugliness with the way ISL handles surface
emitting surface states.  I've never liked that hand-rolled table but it
was the best we had at the time.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index c7072d09025990a9fb84713e134279e5c36bd724..4e899912260982b0180599751843e96b3443534c 100644 (file)
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -48,20 +48,6 @@ __isl_finishme(const char *file, int line, const char *fmt, ...)
    fprintf(stderr, "%s:%d: FINISHME: %s\n", file, line, buf);
 }
 
-static const struct {
-   uint8_t size;
-   uint8_t align;
-   uint8_t addr_offset;
-   uint8_t aux_addr_offset;
-} ss_infos[] = {
-   [4] = {24, 32,  4},
-   [5] = {24, 32,  4},
-   [6] = {24, 32,  4},
-   [7] = {32, 32,  4, 24},
-   [8] = {64, 64, 32, 40},
-   [9] = {64, 64, 32, 40},
-};
-
 void
 isl_device_init(struct isl_device *dev,
                 const struct gen_device_info *info,
@@ -84,10 +70,19 @@ isl_device_init(struct isl_device *dev,
    if (info->must_use_separate_stencil)
       assert(ISL_DEV_USE_SEPARATE_STENCIL(dev));
 
-   dev->ss.size = ss_infos[ISL_DEV_GEN(dev)].size;
-   dev->ss.align = ss_infos[ISL_DEV_GEN(dev)].align;
-   dev->ss.addr_offset = ss_infos[ISL_DEV_GEN(dev)].addr_offset;
-   dev->ss.aux_addr_offset = ss_infos[ISL_DEV_GEN(dev)].aux_addr_offset;
+   dev->ss.size = RENDER_SURFACE_STATE_length(info) * 4;
+   dev->ss.align = isl_align(dev->ss.size, 32);
+
+   assert(RENDER_SURFACE_STATE_SurfaceBaseAddress_start(info) % 8 == 0);
+   dev->ss.addr_offset =
+      RENDER_SURFACE_STATE_SurfaceBaseAddress_start(info) / 8;
+
+   /* The "Auxiliary Surface Base Address" field starts a bit higher up
+    * because the bottom 12 bits are used for other things.  Round down to
+    * the nearest dword before.
+    */
+   dev->ss.aux_addr_offset =
+      (RENDER_SURFACE_STATE_AuxiliarySurfaceBaseAddress_start(info) & ~31) / 8;
 }
 
 /**