+2021-01-04 Luis Machado <luis.machado@linaro.org>
+
+ Update all users of trad_frame_saved_reg to use the new member
+ functions.
+
+ Remote all struct keywords from declarations of trad_frame_saved_reg
+ types, except on forward declarations.
+
+ * aarch64-tdep.c: Update.
+ * alpha-mdebug-tdep.c: Update.
+ * alpha-tdep.c: Update.
+ * arc-tdep.c: Update.
+ * arm-tdep.c: Update.
+ * avr-tdep.c: Update.
+ * cris-tdep.c: Update.
+ * csky-tdep.c: Update.
+ * frv-tdep.c: Update.
+ * hppa-linux-tdep.c: Update.
+ * hppa-tdep.c: Update.
+ * hppa-tdep.h: Update.
+ * lm32-tdep.c: Update.
+ * m32r-linux-tdep.c: Update.
+ * m32r-tdep.c: Update.
+ * m68hc11-tdep.c: Update.
+ * mips-tdep.c: Update.
+ * moxie-tdep.c: Update.
+ * riscv-tdep.c: Update.
+ * rs6000-tdep.c: Update.
+ * s390-linux-tdep.c: Update.
+ * s390-tdep.c: Update.
+ * score-tdep.c: Update.
+ * sparc-netbsd-tdep.c: Update.
+ * sparc-sol2-tdep.c: Update.
+ * sparc64-fbsd-tdep.c: Update.
+ * sparc64-netbsd-tdep.c: Update.
+ * sparc64-obsd-tdep.c: Update.
+ * sparc64-sol2-tdep.c: Update.
+ * tilegx-tdep.c: Update.
+ * v850-tdep.c: Update.
+ * vax-tdep.c: Update.
+
+ * frame-unwind.c (frame_unwind_got_bytes): Make parameter const.
+ * frame-unwind.h (frame_unwind_got_bytes): Likewise.
+
+ * trad-frame.c: Update.
+ Remove TF_REG_* enum.
+ (trad_frame_alloc_saved_regs): Add a static assertion to check for
+ a trivially-constructible struct.
+ (trad_frame_reset_saved_regs): Adjust to use member function.
+ (trad_frame_value_p): Likewise.
+ (trad_frame_addr_p): Likewise.
+ (trad_frame_realreg_p): Likewise.
+ (trad_frame_value_bytes_p): Likewise.
+ (trad_frame_set_value): Likewise.
+ (trad_frame_set_realreg): Likewise.
+ (trad_frame_set_addr): Likewise.
+ (trad_frame_set_unknown): Likewise.
+ (trad_frame_set_value_bytes): Likewise.
+ (trad_frame_get_prev_register): Likewise.
+ * trad-frame.h: Update.
+ (trad_frame_saved_reg_kind): New enum.
+ (struct trad_frame_saved_reg) <addr, realreg, data>: Remove.
+ <m_kind, m_reg>: New member fields.
+ <set_value, set_realreg, set_addr, set_unknown, set_value_bytes>
+ <kind, value, realreg, addr, value_bytes, is_value, is_realreg>
+ <is_addr, is_unknown, is_value_bytes>: New member functions.
+
2021-01-02 Simon Marchi <simon.marchi@polymtl.ca>
* target-float.c: Fix typos.
int framereg;
/* Saved register offsets. */
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
static void
CORE_ADDR offset;
if (stack.find_reg (gdbarch, i, &offset))
- cache->saved_regs[i].addr = offset;
+ cache->saved_regs[i].set_addr (offset);
}
for (i = 0; i < AARCH64_D_REGISTER_COUNT; i++)
if (stack.find_reg (gdbarch, i + AARCH64_X_REGISTER_COUNT,
&offset))
- cache->saved_regs[i + regnum + AARCH64_D0_REGNUM].addr = offset;
+ cache->saved_regs[i + regnum + AARCH64_D0_REGNUM].set_addr (offset);
}
return start;
for (int i = 0; i < AARCH64_X_REGISTER_COUNT; i++)
{
if (i == AARCH64_FP_REGNUM)
- SELF_CHECK (cache.saved_regs[i].addr == -272);
+ SELF_CHECK (cache.saved_regs[i].addr () == -272);
else if (i == AARCH64_LR_REGNUM)
- SELF_CHECK (cache.saved_regs[i].addr == -264);
+ SELF_CHECK (cache.saved_regs[i].addr () == -264);
else
- SELF_CHECK (cache.saved_regs[i].addr == -1);
+ SELF_CHECK (cache.saved_regs[i].is_realreg ());
}
for (int i = 0; i < AARCH64_D_REGISTER_COUNT; i++)
{
int regnum = gdbarch_num_regs (gdbarch);
- SELF_CHECK (cache.saved_regs[i + regnum + AARCH64_D0_REGNUM].addr
- == -1);
+ SELF_CHECK (cache.saved_regs[i + regnum
+ + AARCH64_D0_REGNUM].is_realreg ());
}
}
for (int i = 0; i < AARCH64_X_REGISTER_COUNT; i++)
{
if (i == 1)
- SELF_CHECK (cache.saved_regs[i].addr == -16);
+ SELF_CHECK (cache.saved_regs[i].addr () == -16);
else if (i == 19)
- SELF_CHECK (cache.saved_regs[i].addr == -48);
+ SELF_CHECK (cache.saved_regs[i].addr () == -48);
else
- SELF_CHECK (cache.saved_regs[i].addr == -1);
+ SELF_CHECK (cache.saved_regs[i].is_realreg ());
}
for (int i = 0; i < AARCH64_D_REGISTER_COUNT; i++)
int regnum = gdbarch_num_regs (gdbarch);
if (i == 0)
- SELF_CHECK (cache.saved_regs[i + regnum + AARCH64_D0_REGNUM].addr
+ SELF_CHECK (cache.saved_regs[i + regnum
+ + AARCH64_D0_REGNUM].addr ()
== -24);
else
- SELF_CHECK (cache.saved_regs[i + regnum + AARCH64_D0_REGNUM].addr
- == -1);
+ SELF_CHECK (cache.saved_regs[i + regnum
+ + AARCH64_D0_REGNUM].is_realreg ());
}
}
for (int i = 0; i < AARCH64_X_REGISTER_COUNT; i++)
{
if (i == 19)
- SELF_CHECK (cache.saved_regs[i].addr == -20);
+ SELF_CHECK (cache.saved_regs[i].addr () == -20);
else if (i == AARCH64_FP_REGNUM)
- SELF_CHECK (cache.saved_regs[i].addr == -48);
+ SELF_CHECK (cache.saved_regs[i].addr () == -48);
else if (i == AARCH64_LR_REGNUM)
- SELF_CHECK (cache.saved_regs[i].addr == -40);
+ SELF_CHECK (cache.saved_regs[i].addr () == -40);
else
- SELF_CHECK (cache.saved_regs[i].addr == -1);
+ SELF_CHECK (cache.saved_regs[i].is_realreg ());
}
if (tdep->has_pauth ())
{
SELF_CHECK (trad_frame_value_p (cache.saved_regs,
tdep->pauth_ra_state_regnum));
- SELF_CHECK (cache.saved_regs[tdep->pauth_ra_state_regnum].addr == 1);
+ SELF_CHECK (cache.saved_regs[tdep->pauth_ra_state_regnum].addr ()
+ == 1);
}
}
}
cache->framereg = AARCH64_FP_REGNUM;
cache->framesize = 16;
- cache->saved_regs[29].addr = 0;
- cache->saved_regs[30].addr = 8;
+ cache->saved_regs[29].set_addr (0);
+ cache->saved_regs[30].set_addr (8);
}
}
determined by aarch64_analyze_prologue. */
for (reg = 0; reg < gdbarch_num_regs (get_frame_arch (this_frame)); reg++)
if (trad_frame_addr_p (cache->saved_regs, reg))
- cache->saved_regs[reg].addr += cache->prev_sp;
+ cache->saved_regs[reg].set_addr (cache->saved_regs[reg].addr ()
+ + cache->prev_sp);
cache->func = get_frame_func (this_frame);
{
struct mdebug_extra_func_info *proc_desc;
CORE_ADDR vfp;
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
/* Extract all of the information about the frame from PROC_DESC
/* Clear bit for RA so we don't save it again later. */
mask &= ~(1 << returnreg);
- info->saved_regs[returnreg].addr = reg_position;
+ info->saved_regs[returnreg].set_addr (reg_position);
reg_position += 8;
}
for (ireg = 0; ireg <= 31; ++ireg)
if (mask & (1 << ireg))
{
- info->saved_regs[ireg].addr = reg_position;
+ info->saved_regs[ireg].set_addr (reg_position);
reg_position += 8;
}
for (ireg = 0; ireg <= 31; ++ireg)
if (mask & (1 << ireg))
{
- info->saved_regs[ALPHA_FP0_REGNUM + ireg].addr = reg_position;
+ info->saved_regs[ALPHA_FP0_REGNUM + ireg].set_addr (reg_position);
reg_position += 8;
}
{
CORE_ADDR vfp;
CORE_ADDR start_pc;
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
int return_reg;
};
pointer or not. */
/* Hack: temporarily add one, so that the offset is non-zero
and we can tell which registers have save offsets below. */
- info->saved_regs[reg].addr = (word & 0xffff) + 1;
+ info->saved_regs[reg].set_addr ((word & 0xffff) + 1);
/* Starting with OSF/1-3.2C, the system libraries are shipped
without local symbols, but they still contain procedure
one to the offsets to make all detected offsets non-zero. */
for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
if (trad_frame_addr_p(info->saved_regs, reg))
- info->saved_regs[reg].addr += val - 1;
+ info->saved_regs[reg].set_addr (info->saved_regs[reg].addr ()
+ + val - 1);
/* The stack pointer of the previous frame is computed by popping
the current stack frame. */
/* Store addresses for registers saved in prologue. During prologue analysis
GDB stores offsets relatively to "old SP", then after old SP is evaluated,
offsets are replaced with absolute addresses. */
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
/* Global debug flag. */
{
CORE_ADDR offset;
if (stack.find_reg (gdbarch, i, &offset))
- cache->saved_regs[i].addr = offset;
+ cache->saved_regs[i].set_addr (offset);
}
}
debug_printf ("arc: saved register %s at %s %s\n",
gdbarch_register_name (gdbarch, i),
(addresses_known) ? "address" : "offset",
- paddress (gdbarch, cache->saved_regs[i].addr));
+ paddress (gdbarch, cache->saved_regs[i].addr ()));
}
}
for (int i = 0; i <= ARC_LAST_CORE_REGNUM; i++)
{
if (trad_frame_addr_p (cache->saved_regs, i))
- cache->saved_regs[i].addr += cache->prev_sp;
+ cache->saved_regs[i].set_addr (cache->saved_regs[i].addr ()
+ + cache->prev_sp);
}
if (arc_debug)
for (int i = 0; i < tdep->sc_num_regs; i++)
{
if (tdep->sc_reg_offset[i] != ARC_OFFSET_NO_REGISTER)
- cache->saved_regs[i].addr = addr + tdep->sc_reg_offset[i];
+ cache->saved_regs[i].set_addr (addr + tdep->sc_reg_offset[i]);
}
return cache;
int framereg;
/* Saved register offsets. */
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
namespace {
for (i = 0; i < 16; i++)
if (stack.find_reg (gdbarch, i, &offset))
- cache->saved_regs[i].addr = offset;
+ cache->saved_regs[i].set_addr (offset);
return unrecognized_pc;
}
for (regno = 0; regno < ARM_FPS_REGNUM; regno++)
if (stack.find_reg (gdbarch, regno, &offset))
- cache->saved_regs[regno].addr = offset;
+ cache->saved_regs[regno].set_addr (offset);
}
if (arm_debug)
determined by arm_scan_prologue. */
for (reg = 0; reg < gdbarch_num_regs (get_frame_arch (this_frame)); reg++)
if (trad_frame_addr_p (cache->saved_regs, reg))
- cache->saved_regs[reg].addr += cache->prev_sp;
+ cache->saved_regs[reg].set_addr (cache->saved_regs[reg].addr ()
+ + cache->prev_sp);
return cache;
}
{
if (trad_frame_realreg_p (cache->saved_regs, ARM_SP_REGNUM))
{
- int reg = cache->saved_regs[ARM_SP_REGNUM].realreg;
+ int reg = cache->saved_regs[ARM_SP_REGNUM].realreg ();
vsp = get_frame_register_unsigned (this_frame, reg);
}
else
{
- CORE_ADDR addr = cache->saved_regs[ARM_SP_REGNUM].addr;
+ CORE_ADDR addr = cache->saved_regs[ARM_SP_REGNUM].addr ();
vsp = get_frame_memory_unsigned (this_frame, addr, 4);
}
for (i = 0; i < 12; i++)
if (mask & (1 << i))
{
- cache->saved_regs[4 + i].addr = vsp;
+ cache->saved_regs[4 + i].set_addr (vsp);
vsp += 4;
}
/* Pop r4..r[4+count]. */
for (i = 0; i <= count; i++)
{
- cache->saved_regs[4 + i].addr = vsp;
+ cache->saved_regs[4 + i].set_addr (vsp);
vsp += 4;
}
/* If indicated by flag, pop LR as well. */
if (pop_lr)
{
- cache->saved_regs[ARM_LR_REGNUM].addr = vsp;
+ cache->saved_regs[ARM_LR_REGNUM].set_addr (vsp);
vsp += 4;
}
}
for (i = 0; i < 4; i++)
if (mask & (1 << i))
{
- cache->saved_regs[i].addr = vsp;
+ cache->saved_regs[i].set_addr (vsp);
vsp += 4;
}
}
/* Pop VFP double-precision registers D[start]..D[start+count]. */
for (i = 0; i <= count; i++)
{
- cache->saved_regs[ARM_D0_REGNUM + start + i].addr = vsp;
+ cache->saved_regs[ARM_D0_REGNUM + start + i].set_addr (vsp);
vsp += 8;
}
/* Pop VFP double-precision registers D[8]..D[8+count]. */
for (i = 0; i <= count; i++)
{
- cache->saved_regs[ARM_D0_REGNUM + 8 + i].addr = vsp;
+ cache->saved_regs[ARM_D0_REGNUM + 8 + i].set_addr (vsp);
vsp += 8;
}
/* Pop iwmmx registers WR[start]..WR[start+count]. */
for (i = 0; i <= count; i++)
{
- cache->saved_regs[ARM_WR0_REGNUM + start + i].addr = vsp;
+ cache->saved_regs[ARM_WR0_REGNUM + start + i].set_addr (vsp);
vsp += 8;
}
}
for (i = 0; i < 4; i++)
if (mask & (1 << i))
{
- cache->saved_regs[ARM_WCGR0_REGNUM + i].addr = vsp;
+ cache->saved_regs[ARM_WCGR0_REGNUM + i].set_addr (vsp);
vsp += 4;
}
}
/* Pop iwmmx registers WR[10]..WR[10+count]. */
for (i = 0; i <= count; i++)
{
- cache->saved_regs[ARM_WR0_REGNUM + 10 + i].addr = vsp;
+ cache->saved_regs[ARM_WR0_REGNUM + 10 + i].set_addr (vsp);
vsp += 8;
}
}
D[16+start]..D[16+start+count]. */
for (i = 0; i <= count; i++)
{
- cache->saved_regs[ARM_D0_REGNUM + 16 + start + i].addr = vsp;
+ cache->saved_regs[ARM_D0_REGNUM + 16 + start + i].set_addr (vsp);
vsp += 8;
}
}
/* Pop VFP double-precision registers D[start]..D[start+count]. */
for (i = 0; i <= count; i++)
{
- cache->saved_regs[ARM_D0_REGNUM + start + i].addr = vsp;
+ cache->saved_regs[ARM_D0_REGNUM + start + i].set_addr (vsp);
vsp += 8;
}
}
/* Pop VFP double-precision registers D[8]..D[8+count]. */
for (i = 0; i <= count; i++)
{
- cache->saved_regs[ARM_D0_REGNUM + 8 + i].addr = vsp;
+ cache->saved_regs[ARM_D0_REGNUM + 8 + i].set_addr (vsp);
vsp += 8;
}
}
/* If we restore SP from a register, assume this was the frame register.
Otherwise just fall back to SP as frame register. */
if (trad_frame_realreg_p (cache->saved_regs, ARM_SP_REGNUM))
- cache->framereg = cache->saved_regs[ARM_SP_REGNUM].realreg;
+ cache->framereg = cache->saved_regs[ARM_SP_REGNUM].realreg ();
else
cache->framereg = ARM_SP_REGNUM;
determined by arm_scan_prologue. */
for (reg = 0; reg < gdbarch_num_regs (get_frame_arch (this_frame)); reg++)
if (trad_frame_addr_p (cache->saved_regs, reg))
- cache->saved_regs[reg].addr += cache->prev_sp;
+ cache->saved_regs[reg].set_addr (cache->saved_regs[reg].addr ()
+ + cache->prev_sp);
return cache;
}
ReturnAddress, LR (R14), R12, R3, R2, R1, R0. See details in
"B1.5.6 Exception entry behavior" in
"ARMv7-M Architecture Reference Manual". */
- cache->saved_regs[0].addr = unwound_sp;
- cache->saved_regs[1].addr = unwound_sp + 4;
- cache->saved_regs[2].addr = unwound_sp + 8;
- cache->saved_regs[3].addr = unwound_sp + 12;
- cache->saved_regs[ARM_IP_REGNUM].addr = unwound_sp + 16;
- cache->saved_regs[ARM_LR_REGNUM].addr = unwound_sp + 20;
- cache->saved_regs[ARM_PC_REGNUM].addr = unwound_sp + 24;
- cache->saved_regs[ARM_PS_REGNUM].addr = unwound_sp + 28;
+ cache->saved_regs[0].set_addr (unwound_sp);
+ cache->saved_regs[1].set_addr (unwound_sp + 4);
+ cache->saved_regs[2].set_addr (unwound_sp + 8);
+ cache->saved_regs[3].set_addr (unwound_sp + 12);
+ cache->saved_regs[ARM_IP_REGNUM].set_addr (unwound_sp + 16);
+ cache->saved_regs[ARM_LR_REGNUM].set_addr (unwound_sp + 20);
+ cache->saved_regs[ARM_PC_REGNUM].set_addr (unwound_sp + 24);
+ cache->saved_regs[ARM_PS_REGNUM].set_addr (unwound_sp + 28);
/* Check EXC_RETURN bit FTYPE if extended stack frame (FPU regs stored)
type used. */
fpu_regs_stack_offset = unwound_sp + 0x20;
for (i = 0; i < 16; i++)
{
- cache->saved_regs[ARM_D0_REGNUM + i].addr = fpu_regs_stack_offset;
+ cache->saved_regs[ARM_D0_REGNUM + i].set_addr (fpu_regs_stack_offset);
fpu_regs_stack_offset += 4;
}
- cache->saved_regs[ARM_FPSCR_REGNUM].addr = unwound_sp + 0x60;
+ cache->saved_regs[ARM_FPSCR_REGNUM].set_addr (unwound_sp + 0x60);
/* Offset 0x64 is reserved. */
cache->prev_sp = unwound_sp + 0x68;
int size;
int prologue_type;
/* Table indicating the location of each and every register. */
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
struct gdbarch_tdep
{
int from;
- info->saved_regs[AVR_FP_REGNUM + 1].addr = num_pushes;
+ info->saved_regs[AVR_FP_REGNUM + 1].set_addr (num_pushes);
if (num_pushes >= 2)
- info->saved_regs[AVR_FP_REGNUM].addr = num_pushes - 1;
+ info->saved_regs[AVR_FP_REGNUM].set_addr (num_pushes - 1);
i = 0;
for (from = AVR_LAST_PUSHED_REGNUM + 1 - (num_pushes - 2);
from <= AVR_LAST_PUSHED_REGNUM; ++from)
- info->saved_regs [from].addr = ++i;
+ info->saved_regs [from].set_addr (++i);
}
info->size = loc_size + num_pushes;
info->prologue_type = AVR_PROLOGUE_CALL;
{
info->prologue_type = AVR_PROLOGUE_INTR;
vpc += sizeof (img);
- info->saved_regs[AVR_SREG_REGNUM].addr = 3;
- info->saved_regs[0].addr = 2;
- info->saved_regs[1].addr = 1;
+ info->saved_regs[AVR_SREG_REGNUM].set_addr (3);
+ info->saved_regs[0].set_addr (2);
+ info->saved_regs[1].set_addr (1);
info->size += 3;
}
else if (len >= sizeof (img) - 2
{
info->prologue_type = AVR_PROLOGUE_SIG;
vpc += sizeof (img) - 2;
- info->saved_regs[AVR_SREG_REGNUM].addr = 3;
- info->saved_regs[0].addr = 2;
- info->saved_regs[1].addr = 1;
+ info->saved_regs[AVR_SREG_REGNUM].set_addr (3);
+ info->saved_regs[0].set_addr (2);
+ info->saved_regs[1].set_addr (1);
info->size += 2;
}
}
/* Bits 4-9 contain a mask for registers R0-R32. */
int regno = (insn & 0x1f0) >> 4;
info->size++;
- info->saved_regs[regno].addr = info->size;
+ info->saved_regs[regno].set_addr (info->size);
scan_stage = 1;
}
else
{
CORE_ADDR prologue_end = pc;
struct avr_unwind_cache info = {0};
- struct trad_frame_saved_reg saved_regs[AVR_NUM_REGS];
+ trad_frame_saved_reg saved_regs[AVR_NUM_REGS];
info.saved_regs = saved_regs;
/* Adjust all the saved registers so that they contain addresses and not
offsets. */
for (i = 0; i < gdbarch_num_regs (gdbarch) - 1; i++)
- if (info->saved_regs[i].addr > 0)
- info->saved_regs[i].addr = info->prev_sp - info->saved_regs[i].addr;
+ if (info->saved_regs[i].addr () > 0)
+ info->saved_regs[i].set_addr (info->prev_sp
+ - info->saved_regs[i].addr ());
/* Except for the main and startup code, the return PC is always saved on
the stack and is at the base of the frame. */
if (info->prologue_type != AVR_PROLOGUE_MAIN)
- info->saved_regs[AVR_PC_REGNUM].addr = info->prev_sp;
+ info->saved_regs[AVR_PC_REGNUM].set_addr (info->prev_sp);
/* The previous frame's SP needed to be computed. Save the computed
value. */
struct gdbarch *gdbarch = get_frame_arch (this_frame);
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
- read_memory (info->saved_regs[AVR_PC_REGNUM].addr,
+ read_memory (info->saved_regs[AVR_PC_REGNUM].addr (),
buf, tdep->call_length);
/* Extract the PC read from memory as a big-endian. */
int leaf_function;
/* Table indicating the location of each and every register. */
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
static struct cris_unwind_cache *
/* R0 to R13 are stored in reverse order at offset (2 * 4) in
struct pt_regs. */
for (i = 0; i <= 13; i++)
- info->saved_regs[i].addr = addr + ((15 - i) * 4);
+ info->saved_regs[i].set_addr (addr + ((15 - i) * 4));
- info->saved_regs[MOF_REGNUM].addr = addr + (16 * 4);
- info->saved_regs[DCCR_REGNUM].addr = addr + (17 * 4);
- info->saved_regs[SRP_REGNUM].addr = addr + (18 * 4);
+ info->saved_regs[MOF_REGNUM].set_addr (addr + (16 * 4));
+ info->saved_regs[DCCR_REGNUM].set_addr (addr + (17 * 4));
+ info->saved_regs[SRP_REGNUM].set_addr (addr + (18 * 4));
/* Note: IRP is off by 2 at this point. There's no point in correcting
it though since that will mean that the backtrace will show a PC
different from what is shown when stopped. */
- info->saved_regs[IRP_REGNUM].addr = addr + (19 * 4);
+ info->saved_regs[IRP_REGNUM].set_addr (addr + (19 * 4));
info->saved_regs[gdbarch_pc_regnum (gdbarch)]
= info->saved_regs[IRP_REGNUM];
- info->saved_regs[gdbarch_sp_regnum (gdbarch)].addr = addr + (24 * 4);
+ info->saved_regs[gdbarch_sp_regnum (gdbarch)].set_addr (addr + (24 * 4));
}
else
{
/* R0 to R13 are stored in order at offset (1 * 4) in
struct pt_regs. */
for (i = 0; i <= 13; i++)
- info->saved_regs[i].addr = addr + ((i + 1) * 4);
-
- info->saved_regs[ACR_REGNUM].addr = addr + (15 * 4);
- info->saved_regs[SRS_REGNUM].addr = addr + (16 * 4);
- info->saved_regs[MOF_REGNUM].addr = addr + (17 * 4);
- info->saved_regs[SPC_REGNUM].addr = addr + (18 * 4);
- info->saved_regs[CCS_REGNUM].addr = addr + (19 * 4);
- info->saved_regs[SRP_REGNUM].addr = addr + (20 * 4);
- info->saved_regs[ERP_REGNUM].addr = addr + (21 * 4);
- info->saved_regs[EXS_REGNUM].addr = addr + (22 * 4);
- info->saved_regs[EDA_REGNUM].addr = addr + (23 * 4);
+ info->saved_regs[i].set_addr (addr + ((i + 1) * 4));
+
+ info->saved_regs[ACR_REGNUM].set_addr (addr + (15 * 4));
+ info->saved_regs[SRS_REGNUM].set_addr (addr + (16 * 4));
+ info->saved_regs[MOF_REGNUM].set_addr (addr + (17 * 4));
+ info->saved_regs[SPC_REGNUM].set_addr (addr + (18 * 4));
+ info->saved_regs[CCS_REGNUM].set_addr (addr + (19 * 4));
+ info->saved_regs[SRP_REGNUM].set_addr (addr + (20 * 4));
+ info->saved_regs[ERP_REGNUM].set_addr (addr + (21 * 4));
+ info->saved_regs[EXS_REGNUM].set_addr (addr + (22 * 4));
+ info->saved_regs[EDA_REGNUM].set_addr (addr + (23 * 4));
/* FIXME: If ERP is in a delay slot at this point then the PC will
be wrong at this point. This problem manifests itself in the
info->saved_regs[gdbarch_pc_regnum (gdbarch)]
= info->saved_regs[ERP_REGNUM];
- info->saved_regs[gdbarch_sp_regnum (gdbarch)].addr
- = addr + (25 * 4);
+ info->saved_regs[gdbarch_sp_regnum (gdbarch)].set_addr (addr + (25 * 4));
}
return info;
the next frame. */
this_base = get_frame_register_unsigned (this_frame, CRIS_FP_REGNUM);
info->base = this_base;
- info->saved_regs[CRIS_FP_REGNUM].addr = info->base;
+ info->saved_regs[CRIS_FP_REGNUM].set_addr (info->base);
/* The FP points at the last saved register. Adjust the FP back
to before the first saved register giving the SP. */
for (regno = regsave; regno >= 0; regno--)
{
- info->saved_regs[regno].addr = info->base + info->r8_offset - val;
+ info->saved_regs[regno].set_addr (info->base + info->r8_offset - val);
val -= 4;
}
if (info->r8_offset == 0)
{
/* R8 not pushed yet. */
- info->saved_regs[SRP_REGNUM].addr = info->base;
+ info->saved_regs[SRP_REGNUM].set_addr (info->base);
}
else
{
/* R8 pushed, but SP may or may not be moved to R8 yet. */
- info->saved_regs[SRP_REGNUM].addr = info->base + 4;
+ info->saved_regs[SRP_REGNUM].set_addr (info->base + 4);
}
}
int framereg;
/* Saved register offsets. */
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
/* Do prologue analysis, returning the PC of the first instruction
{
if (register_offsets[rn] >= 0)
{
- this_cache->saved_regs[rn].addr
- = this_cache->prev_sp - register_offsets[rn];
+ this_cache->saved_regs[rn].set_addr (this_cache->prev_sp
+ - register_offsets[rn]);
if (csky_debug)
{
CORE_ADDR rn_value = read_memory_unsigned_integer (
- this_cache->saved_regs[rn].addr, 4, byte_order);
+ this_cache->saved_regs[rn].addr (), 4, byte_order);
fprintf_unfiltered (gdb_stdlog, "Saved register %s "
"stored at 0x%08lx, value=0x%08lx\n",
csky_register_names[rn],
(unsigned long)
- this_cache->saved_regs[rn].addr,
+ this_cache->saved_regs[rn].addr (),
(unsigned long) rn_value);
}
}
}
struct value *
-frame_unwind_got_bytes (struct frame_info *frame, int regnum, gdb_byte *buf)
+frame_unwind_got_bytes (struct frame_info *frame, int regnum, const gdb_byte *buf)
{
struct gdbarch *gdbarch = frame_unwind_arch (frame);
struct value *reg_val;
inside BUF. */
struct value *frame_unwind_got_bytes (struct frame_info *frame, int regnum,
- gdb_byte *buf);
+ const gdb_byte *buf);
/* Return a value which indicates that FRAME's saved version of REGNUM
has a known constant (computed) value of ADDR. Convert the
CORE_ADDR base;
/* Table indicating the location of each and every register. */
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
/* A structure describing a particular variant of the FRV.
for (i = 0; i < 64; i++)
if (gr_saved[i])
- info->saved_regs[i].addr = this_base - fp_offset + gr_sp_offset[i];
+ info->saved_regs[i].set_addr (this_base - fp_offset
+ + gr_sp_offset[i]);
info->prev_sp = this_base - fp_offset + framesize;
info->base = this_base;
/* If LR was saved on the stack, record its location. */
if (lr_saved_on_stack)
- info->saved_regs[lr_regnum].addr
- = this_base - fp_offset + lr_sp_offset;
+ info->saved_regs[lr_regnum].set_addr (this_base - fp_offset
+ + lr_sp_offset);
/* The call instruction moves the caller's PC in the callee's LR.
Since this is an unwind, do the reverse. Copy the location of LR
struct hppa_linux_sigtramp_unwind_cache
{
CORE_ADDR base;
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
static struct hppa_linux_sigtramp_unwind_cache *
scptr += 4;
/* GR[0] is the psw. */
- info->saved_regs[HPPA_IPSW_REGNUM].addr = scptr;
+ info->saved_regs[HPPA_IPSW_REGNUM].set_addr (scptr);
scptr += 4;
/* General registers. */
for (i = 1; i < 32; i++)
{
- info->saved_regs[HPPA_R0_REGNUM + i].addr = scptr;
+ info->saved_regs[HPPA_R0_REGNUM + i].set_addr (scptr);
scptr += 4;
}
for (i = 4; i < 32; i++)
{
- info->saved_regs[HPPA_FP0_REGNUM + (i * 2)].addr = scptr;
+ info->saved_regs[HPPA_FP0_REGNUM + (i * 2)].set_addr (scptr);
scptr += 4;
- info->saved_regs[HPPA_FP0_REGNUM + (i * 2) + 1].addr = scptr;
+ info->saved_regs[HPPA_FP0_REGNUM + (i * 2) + 1].set_addr (scptr);
scptr += 4;
}
/* IASQ/IAOQ. */
- info->saved_regs[HPPA_PCSQ_HEAD_REGNUM].addr = scptr;
+ info->saved_regs[HPPA_PCSQ_HEAD_REGNUM].set_addr (scptr);
scptr += 4;
- info->saved_regs[HPPA_PCSQ_TAIL_REGNUM].addr = scptr;
+ info->saved_regs[HPPA_PCSQ_TAIL_REGNUM].set_addr (scptr);
scptr += 4;
- info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].addr = scptr;
+ info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_addr (scptr);
scptr += 4;
- info->saved_regs[HPPA_PCOQ_TAIL_REGNUM].addr = scptr;
+ info->saved_regs[HPPA_PCOQ_TAIL_REGNUM].set_addr (scptr);
scptr += 4;
- info->saved_regs[HPPA_SAR_REGNUM].addr = scptr;
+ info->saved_regs[HPPA_SAR_REGNUM].set_addr (scptr);
info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
struct hppa_frame_cache
{
CORE_ADDR base;
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
static struct hppa_frame_cache *
if (inst == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
{
looking_for_rp = 0;
- cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
+ cache->saved_regs[HPPA_RP_REGNUM].set_addr (-20);
}
else if (inst == 0x6bc23fd1) /* stw rp,-0x18(sr0,sp) */
{
looking_for_rp = 0;
- cache->saved_regs[HPPA_RP_REGNUM].addr = -24;
+ cache->saved_regs[HPPA_RP_REGNUM].set_addr (-24);
}
else if (inst == 0x0fc212c1
|| inst == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
{
looking_for_rp = 0;
- cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
+ cache->saved_regs[HPPA_RP_REGNUM].set_addr (-16);
}
/* Check to see if we saved SP into the stack. This also
|| (inst & 0xffffc00c) == 0x73c10008) /* std,ma r1,N(sr0,sp) */
{
looking_for_sp = 0;
- cache->saved_regs[HPPA_FP_REGNUM].addr = 0;
+ cache->saved_regs[HPPA_FP_REGNUM].set_addr (0);
}
else if (inst == 0x08030241) /* copy %r3, %r1 */
{
if ((inst >> 26) == 0x1b && hppa_extract_14 (inst) >= 0)
/* stwm with a positive displacement is a _post_
_modify_. */
- cache->saved_regs[reg].addr = 0;
+ cache->saved_regs[reg].set_addr (0);
else if ((inst & 0xfc00000c) == 0x70000008)
/* A std has explicit post_modify forms. */
- cache->saved_regs[reg].addr = 0;
+ cache->saved_regs[reg].set_addr (0);
else
{
CORE_ADDR offset;
/* Handle code with and without frame pointers. */
if (u->Save_SP)
- cache->saved_regs[reg].addr = offset;
+ cache->saved_regs[reg].set_addr (offset);
else
- cache->saved_regs[reg].addr
- = (u->Total_frame_size << 3) + offset;
+ cache->saved_regs[reg].set_addr ((u->Total_frame_size << 3)
+ + offset);
}
}
/* 1st HP CC FP register store. After this
instruction we've set enough state that the GCC and
HPCC code are both handled in the same manner. */
- cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].addr = 0;
+ cache->saved_regs[reg + HPPA_FP4_REGNUM + 4].set_addr (0);
fp_loc = 8;
}
else
{
- cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].addr = fp_loc;
+ cache->saved_regs[reg + HPPA_FP0_REGNUM + 4].set_addr (fp_loc);
fp_loc += 8;
}
}
for (reg = 0; reg < gdbarch_num_regs (gdbarch); reg++)
{
if (trad_frame_addr_p (cache->saved_regs, reg))
- cache->saved_regs[reg].addr += cache->base;
+ cache->saved_regs[reg].set_addr (cache->saved_regs[reg].addr ()
+ + cache->base);
}
}
stack. */
if (insn == 0x6bc23fd9) /* stw rp,-0x14(sr0,sp) */
{
- cache->saved_regs[HPPA_RP_REGNUM].addr = -20;
+ cache->saved_regs[HPPA_RP_REGNUM].set_addr (-20);
found_rp = 1;
}
else if (insn == 0x0fc212c1
|| insn == 0x73c23fe1) /* std rp,-0x10(sr0,sp) */
{
- cache->saved_regs[HPPA_RP_REGNUM].addr = -16;
+ cache->saved_regs[HPPA_RP_REGNUM].set_addr (-16);
found_rp = 1;
}
}
if (trad_frame_addr_p (cache->saved_regs, HPPA_RP_REGNUM))
{
- cache->saved_regs[HPPA_RP_REGNUM].addr += cache->base;
+ cache->saved_regs[HPPA_RP_REGNUM].set_addr (cache->saved_regs[HPPA_RP_REGNUM].addr ()
+ + cache->base);
cache->saved_regs[HPPA_PCOQ_HEAD_REGNUM] =
cache->saved_regs[HPPA_RP_REGNUM];
}
struct hppa_stub_unwind_cache
{
CORE_ADDR base;
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
static struct hppa_stub_unwind_cache *
info->base = get_frame_register_unsigned (this_frame, HPPA_SP_REGNUM);
/* By default we assume that stubs do not change the rp. */
- info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].realreg = HPPA_RP_REGNUM;
+ info->saved_regs[HPPA_PCOQ_HEAD_REGNUM].set_realreg (HPPA_RP_REGNUM);
return info;
}
struct value *
hppa_frame_prev_register_helper (struct frame_info *this_frame,
- struct trad_frame_saved_reg saved_regs[],
+ trad_frame_saved_reg saved_regs[],
int regnum)
{
struct gdbarch *arch = get_frame_arch (this_frame);
adjust the pc to the real caller. This improves the behavior of commands
that traverse frames such as "up" and "finish". */
void (*unwind_adjust_stub) (struct frame_info *this_frame, CORE_ADDR base,
- struct trad_frame_saved_reg *saved_regs);
+ trad_frame_saved_reg *saved_regs);
/* These are solib-dependent methods. They are really HPUX only, but
we don't have a HPUX-specific tdep vector at the moment. */
extern struct value *
hppa_frame_prev_register_helper (struct frame_info *this_frame,
- struct trad_frame_saved_reg *saved_regs,
+ trad_frame_saved_reg *saved_regs,
int regnum);
extern CORE_ADDR hppa_read_pc (struct regcache *regcache);
/* Size of frame. */
int size;
/* Table indicating the location of each and every register. */
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
/* Add the available register groups. */
/* Any stack displaced store is likely part of the prologue.
Record that the register is being saved, and the offset
into the stack. */
- info->saved_regs[LM32_REG1 (instruction)].addr =
- LM32_IMM16 (instruction);
+ info->saved_regs[LM32_REG1 (instruction)].set_addr (LM32_IMM16 (instruction));
}
else if ((LM32_OPCODE (instruction) == OP_ADDI)
&& (LM32_REG1 (instruction) == SIM_LM32_SP_REGNUM))
{
CORE_ADDR func_addr, limit_pc;
struct lm32_frame_cache frame_info;
- struct trad_frame_saved_reg saved_regs[SIM_LM32_NUM_REGS];
+ trad_frame_saved_reg saved_regs[SIM_LM32_NUM_REGS];
/* See if we can determine the end of the prologue via the symbol table.
If so, then return either PC, or the PC after the prologue, whichever
for (i = 0; i < gdbarch_num_regs (get_frame_arch (this_frame)) - 1; i++)
{
if (trad_frame_addr_p (info->saved_regs, i))
- info->saved_regs[i].addr = this_base + info->saved_regs[i].addr;
+ info->saved_regs[i].set_addr (this_base + info->saved_regs[i].addr ());
}
/* The call instruction moves the caller's PC in the callee's RA register.
struct m32r_frame_cache
{
CORE_ADDR base, pc;
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
static struct m32r_frame_cache *
for (regnum = 0; regnum < sizeof (m32r_linux_sc_reg_offset) / 4; regnum++)
{
if (m32r_linux_sc_reg_offset[regnum] >= 0)
- cache->saved_regs[regnum].addr =
- sigcontext_addr + m32r_linux_sc_reg_offset[regnum];
+ cache->saved_regs[regnum].set_addr (sigcontext_addr
+ + m32r_linux_sc_reg_offset[regnum]);
}
return cache;
LONGEST r13_offset;
int uses_frame;
/* Table indicating the location of each and every register. */
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
/* Put here the code to store, into fi->saved_regs, the addresses of
/* st rn, @-sp */
int regno = ((op >> 8) & 0xf);
info->sp_offset -= 4;
- info->saved_regs[regno].addr = info->sp_offset;
+ info->saved_regs[regno].set_addr (info->sp_offset);
}
else if ((op & 0xff00) == 0x4f00)
{
not offsets. */
for (i = 0; i < gdbarch_num_regs (get_frame_arch (this_frame)) - 1; i++)
if (trad_frame_addr_p (info->saved_regs, i))
- info->saved_regs[i].addr = (info->prev_sp + info->saved_regs[i].addr);
+ info->saved_regs[i].set_addr (info->prev_sp
+ + info->saved_regs[i].addr ());
/* The call instruction moves the caller's PC in the callee's LR.
Since this is an unwind, do the reverse. Copy the location of LR
enum insn_return_kind return_kind;
/* Table indicating the location of each and every register. */
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
/* Table of registers for 68HC11. This includes the hard registers
save_addr -= 2;
if (info->saved_regs)
- info->saved_regs[saved_reg].addr = save_addr;
+ info->saved_regs[saved_reg].set_addr (save_addr);
}
else
{
if (info->pc != 0)
m68hc11_scan_prologue (gdbarch, info->pc, current_pc, info);
- info->saved_regs[HARD_PC_REGNUM].addr = info->size;
+ info->saved_regs[HARD_PC_REGNUM].set_addr (info->size);
if (info->sp_offset != (CORE_ADDR) -1)
{
- info->saved_regs[HARD_PC_REGNUM].addr = info->sp_offset;
+ info->saved_regs[HARD_PC_REGNUM].set_addr (info->sp_offset);
this_base = get_frame_register_unsigned (this_frame, HARD_SP_REGNUM);
prev_sp = this_base + info->sp_offset + 2;
this_base += STACK_CORRECTION (gdbarch);
this_base += STACK_CORRECTION (gdbarch);
if (soft_regs[SOFT_FP_REGNUM].name)
- info->saved_regs[SOFT_FP_REGNUM].addr = info->size - 2;
+ info->saved_regs[SOFT_FP_REGNUM].set_addr (info->size - 2);
}
if (info->return_kind == RETURN_RTC)
{
prev_sp += 1;
- info->saved_regs[HARD_PAGE_REGNUM].addr = info->size;
- info->saved_regs[HARD_PC_REGNUM].addr = info->size + 1;
+ info->saved_regs[HARD_PAGE_REGNUM].set_addr (info->size);
+ info->saved_regs[HARD_PC_REGNUM].set_addr (info->size + 1);
}
else if (info->return_kind == RETURN_RTI)
{
prev_sp += 7;
- info->saved_regs[HARD_CCR_REGNUM].addr = info->size;
- info->saved_regs[HARD_D_REGNUM].addr = info->size + 1;
- info->saved_regs[HARD_X_REGNUM].addr = info->size + 3;
- info->saved_regs[HARD_Y_REGNUM].addr = info->size + 5;
- info->saved_regs[HARD_PC_REGNUM].addr = info->size + 7;
+ info->saved_regs[HARD_CCR_REGNUM].set_addr (info->size);
+ info->saved_regs[HARD_D_REGNUM].set_addr (info->size + 1);
+ info->saved_regs[HARD_X_REGNUM].set_addr (info->size + 3);
+ info->saved_regs[HARD_Y_REGNUM].set_addr (info->size + 5);
+ info->saved_regs[HARD_PC_REGNUM].set_addr (info->size + 7);
}
/* Add 1 here to adjust for the post-decrement nature of the push
for (i = 0; i < gdbarch_num_cooked_regs (gdbarch); i++)
if (trad_frame_addr_p (info->saved_regs, i))
{
- info->saved_regs[i].addr += this_base;
+ info->saved_regs[i].set_addr (info->saved_regs[i].addr () + this_base);
}
/* The previous frame's SP needed to be computed. Save the computed
struct mips_frame_cache
{
CORE_ADDR base;
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
/* Set a register's saved stack address in temp_saved_regs. If an
int regnum, CORE_ADDR offset)
{
if (this_cache != NULL
- && this_cache->saved_regs[regnum].addr == -1)
+ && this_cache->saved_regs[regnum].is_realreg ())
{
- this_cache->saved_regs[regnum + 0 * gdbarch_num_regs (gdbarch)].addr
- = offset;
- this_cache->saved_regs[regnum + 1 * gdbarch_num_regs (gdbarch)].addr
- = offset;
+ this_cache->saved_regs[regnum + 0
+ * gdbarch_num_regs (gdbarch)].set_addr (offset);
+ this_cache->saved_regs[regnum + 1
+ * gdbarch_num_regs (gdbarch)].set_addr (offset);
}
}
int i;
for (i = 0; i < num_regs; i++)
- {
- this_cache->saved_regs[i].addr = -1;
- }
+ this_cache->saved_regs[i].set_addr (-1);
}
}
LONGEST r13_offset;
int uses_frame;
/* Table indicating the location of each and every register. */
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
/* Read an unsigned integer from the inferior, and adjust
int frame_base_offset;
/* Information about previous register values. */
- struct trad_frame_saved_reg *regs;
+ trad_frame_saved_reg *regs;
/* The id for this frame. */
struct frame_id this_id;
for (regno = 0; regno < numregs; ++regno)
{
if (trad_frame_addr_p (cache->regs, regno))
- cache->regs[regno].addr += cache->frame_base;
+ cache->regs[regno].set_addr (cache->regs[regno].addr ()
+ + cache->frame_base);
}
/* The previous $pc can be found wherever the $ra value can be found.
{
CORE_ADDR base;
CORE_ADDR initial_sp;
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
/* Set BASE_P to true if this frame cache is properly initialized.
Otherwise set to false because some registers or memory cannot
if (ppc_floating_point_unit_p (gdbarch))
for (i = fdata.saved_fpr; i < ppc_num_fprs; i++)
{
- cache->saved_regs[tdep->ppc_fp0_regnum + i].addr = fpr_addr;
+ cache->saved_regs[tdep->ppc_fp0_regnum + i].set_addr (fpr_addr);
fpr_addr += 8;
}
}
for (i = fdata.saved_gpr; i < ppc_num_gprs; i++)
{
if (fdata.gpr_mask & (1U << i))
- cache->saved_regs[tdep->ppc_gp0_regnum + i].addr = gpr_addr;
+ cache->saved_regs[tdep->ppc_gp0_regnum + i].set_addr (gpr_addr);
gpr_addr += wordsize;
}
}
CORE_ADDR vr_addr = cache->base + fdata.vr_offset;
for (i = fdata.saved_vr; i < 32; i++)
{
- cache->saved_regs[tdep->ppc_vr0_regnum + i].addr = vr_addr;
+ cache->saved_regs[tdep->ppc_vr0_regnum + i].set_addr (vr_addr);
vr_addr += register_size (gdbarch, tdep->ppc_vr0_regnum);
}
}
for (i = fdata.saved_ev; i < ppc_num_gprs; i++)
{
- cache->saved_regs[tdep->ppc_ev0_regnum + i].addr = ev_addr;
- cache->saved_regs[tdep->ppc_gp0_regnum + i].addr = ev_addr + off;
+ cache->saved_regs[tdep->ppc_ev0_regnum + i].set_addr (ev_addr);
+ cache->saved_regs[tdep->ppc_gp0_regnum + i].set_addr (ev_addr
+ + off);
ev_addr += register_size (gdbarch, tdep->ppc_ev0_regnum);
}
}
/* If != 0, fdata.cr_offset is the offset from the frame that
holds the CR. */
if (fdata.cr_offset != 0)
- cache->saved_regs[tdep->ppc_cr_regnum].addr
- = cache->base + fdata.cr_offset;
+ cache->saved_regs[tdep->ppc_cr_regnum].set_addr (cache->base
+ + fdata.cr_offset);
/* If != 0, fdata.lr_offset is the offset from the frame that
holds the LR. */
if (fdata.lr_offset != 0)
- cache->saved_regs[tdep->ppc_lr_regnum].addr
- = cache->base + fdata.lr_offset;
+ cache->saved_regs[tdep->ppc_lr_regnum].set_addr (cache->base
+ + fdata.lr_offset);
else if (fdata.lr_register != -1)
- cache->saved_regs[tdep->ppc_lr_regnum].realreg = fdata.lr_register;
+ cache->saved_regs[tdep->ppc_lr_regnum].set_realreg (fdata.lr_register);
/* The PC is found in the link register. */
cache->saved_regs[gdbarch_pc_regnum (gdbarch)] =
cache->saved_regs[tdep->ppc_lr_regnum];
/* If != 0, fdata.vrsave_offset is the offset from the frame that
holds the VRSAVE. */
if (fdata.vrsave_offset != 0)
- cache->saved_regs[tdep->ppc_vrsave_regnum].addr
- = cache->base + fdata.vrsave_offset;
+ cache->saved_regs[tdep->ppc_vrsave_regnum].set_addr (cache->base
+ + fdata.vrsave_offset);
if (fdata.alloca_reg < 0)
/* If no alloca register used, then fi->frame is the value of the
struct s390_sigtramp_unwind_cache {
CORE_ADDR frame_base;
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
/* Unwind THIS_FRAME and return the corresponding unwind cache for
double fprs[16]; */
/* PSW mask and address. */
- info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
+ info->saved_regs[S390_PSWM_REGNUM].set_addr (sigreg_ptr);
sigreg_ptr += word_size;
- info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
+ info->saved_regs[S390_PSWA_REGNUM].set_addr (sigreg_ptr);
sigreg_ptr += word_size;
/* Then the GPRs. */
for (i = 0; i < 16; i++)
{
- info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
+ info->saved_regs[S390_R0_REGNUM + i].set_addr (sigreg_ptr);
sigreg_ptr += word_size;
}
/* Then the ACRs. */
for (i = 0; i < 16; i++)
{
- info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
+ info->saved_regs[S390_A0_REGNUM + i].set_addr (sigreg_ptr);
sigreg_ptr += 4;
}
/* The floating-point control word. */
- info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
+ info->saved_regs[S390_FPC_REGNUM].set_addr (sigreg_ptr);
sigreg_ptr += 8;
/* And finally the FPRs. */
for (i = 0; i < 16; i++)
{
- info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
+ info->saved_regs[S390_F0_REGNUM + i].set_addr (sigreg_ptr);
sigreg_ptr += 8;
}
if (tdep->gpr_full_regnum != -1)
for (i = 0; i < 16; i++)
{
- info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
+ info->saved_regs[S390_R0_UPPER_REGNUM + i].set_addr (sigreg_ptr);
sigreg_ptr += 4;
}
/* Restore the previous frame's SP. */
prev_sp = read_memory_unsigned_integer (
- info->saved_regs[S390_SP_REGNUM].addr,
+ info->saved_regs[S390_SP_REGNUM].addr (),
word_size, byte_order);
/* Determine our frame base. */
struct value *
s390_trad_frame_prev_register (struct frame_info *this_frame,
- struct trad_frame_saved_reg saved_regs[],
+ trad_frame_saved_reg saved_regs[],
int regnum)
{
if (regnum < S390_NUM_REGS)
CORE_ADDR frame_base;
CORE_ADDR local_base;
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
/* Unwind THIS_FRAME and write the information into unwind cache INFO using
for (i = 0; i < 16; i++)
if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
&& data.gpr_slot[i] != 0)
- info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
+ info->saved_regs[S390_R0_REGNUM + i].set_addr (cfa - data.gpr_slot[i]);
for (i = 0; i < 16; i++)
if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
&& data.fpr_slot[i] != 0)
- info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
+ info->saved_regs[S390_F0_REGNUM + i].set_addr (cfa - data.fpr_slot[i]);
/* Function return will set PC to %r14. */
info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
if (size == 0
&& !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
{
- info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
+ info->saved_regs[S390_PSWA_REGNUM].set_realreg (S390_RETADDR_REGNUM);
}
/* Another sanity check: unless this is a frameless function,
/* We don't know which registers were saved, but it will have
to be at least %r14 and %r15. This will allow us to continue
unwinding, but other prev-frame registers may be incorrect ... */
- info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
- info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
+ info->saved_regs[S390_SP_REGNUM].set_addr (backchain + 15*word_size);
+ info->saved_regs[S390_RETADDR_REGNUM].set_addr (backchain + 14*word_size);
/* Function return will set PC to %r14. */
info->saved_regs[S390_PSWA_REGNUM]
struct s390_stub_unwind_cache
{
CORE_ADDR frame_base;
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
/* Unwind THIS_FRAME and return the corresponding unwind cache for
info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
/* The return address is in register %r14. */
- info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
+ info->saved_regs[S390_PSWA_REGNUM].set_realreg (S390_RETADDR_REGNUM);
/* Retrieve stack pointer and determine our frame base. */
reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
{
CORE_ADDR base;
CORE_ADDR fp;
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
static int target_mach = bfd_mach_score7;
/* Save RA. */
if (ra_offset_p == 1)
{
- if (this_cache->saved_regs[SCORE_PC_REGNUM].addr == -1)
- this_cache->saved_regs[SCORE_PC_REGNUM].addr =
- sp + sp_offset - ra_offset;
+ if (this_cache->saved_regs[SCORE_PC_REGNUM].is_realreg ())
+ this_cache->saved_regs[SCORE_PC_REGNUM].set_addr (sp + sp_offset
+ - ra_offset);
}
else
{
/* Save FP. */
if (fp_offset_p == 1)
{
- if (this_cache->saved_regs[SCORE_FP_REGNUM].addr == -1)
- this_cache->saved_regs[SCORE_FP_REGNUM].addr =
- sp + sp_offset - fp_offset;
+ if (this_cache->saved_regs[SCORE_FP_REGNUM].is_realreg ())
+ this_cache->saved_regs[SCORE_FP_REGNUM].set_addr (sp + sp_offset
+ - fp_offset);
}
/* Save SP and FP. */
/* Save RA. */
if (ra_offset_p == 1)
{
- if (this_cache->saved_regs[SCORE_PC_REGNUM].addr == -1)
- this_cache->saved_regs[SCORE_PC_REGNUM].addr =
- sp + sp_offset - ra_offset;
+ if (this_cache->saved_regs[SCORE_PC_REGNUM].is_realreg ())
+ this_cache->saved_regs[SCORE_PC_REGNUM].set_addr (sp + sp_offset
+ - ra_offset);
}
else
{
/* Save FP. */
if (fp_offset_p == 1)
{
- if (this_cache->saved_regs[SCORE_FP_REGNUM].addr == -1)
- this_cache->saved_regs[SCORE_FP_REGNUM].addr =
- sp + sp_offset - fp_offset;
+ if (this_cache->saved_regs[SCORE_FP_REGNUM].is_realreg ())
+ this_cache->saved_regs[SCORE_FP_REGNUM].set_addr (sp + sp_offset
+ - fp_offset);
}
/* Save SP and FP. */
return nbsd_pc_in_sigtramp (pc, name);
}
-struct trad_frame_saved_reg *
+trad_frame_saved_reg *
sparc32nbsd_sigcontext_saved_regs (struct frame_info *this_frame)
{
struct gdbarch *gdbarch = get_frame_arch (this_frame);
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
CORE_ADDR addr, sigcontext_addr;
int regnum, delta;
ULONGEST psr;
that the part of the signal trampoline that saves the state has
been executed. */
- saved_regs[SPARC_SP_REGNUM].addr = sigcontext_addr + 8;
- saved_regs[SPARC32_PC_REGNUM].addr = sigcontext_addr + 12;
- saved_regs[SPARC32_NPC_REGNUM].addr = sigcontext_addr + 16;
- saved_regs[SPARC32_PSR_REGNUM].addr = sigcontext_addr + 20;
- saved_regs[SPARC_G1_REGNUM].addr = sigcontext_addr + 24;
- saved_regs[SPARC_O0_REGNUM].addr = sigcontext_addr + 28;
+ saved_regs[SPARC_SP_REGNUM].set_addr (sigcontext_addr + 8);
+ saved_regs[SPARC32_PC_REGNUM].set_addr (sigcontext_addr + 12);
+ saved_regs[SPARC32_NPC_REGNUM].set_addr (sigcontext_addr + 16);
+ saved_regs[SPARC32_PSR_REGNUM].set_addr (sigcontext_addr + 20);
+ saved_regs[SPARC_G1_REGNUM].set_addr (sigcontext_addr + 24);
+ saved_regs[SPARC_O0_REGNUM].set_addr (sigcontext_addr + 28);
/* The remaining `global' registers and %y are saved in the `local'
registers. */
delta = SPARC_L0_REGNUM - SPARC_G0_REGNUM;
for (regnum = SPARC_G2_REGNUM; regnum <= SPARC_G7_REGNUM; regnum++)
- saved_regs[regnum].realreg = regnum + delta;
- saved_regs[SPARC32_Y_REGNUM].realreg = SPARC_L1_REGNUM;
+ saved_regs[regnum].set_realreg (regnum + delta);
+ saved_regs[SPARC32_Y_REGNUM].set_realreg (SPARC_L1_REGNUM);
/* The remaining `out' registers can be found in the current frame's
`in' registers. */
delta = SPARC_I0_REGNUM - SPARC_O0_REGNUM;
for (regnum = SPARC_O1_REGNUM; regnum <= SPARC_O5_REGNUM; regnum++)
- saved_regs[regnum].realreg = regnum + delta;
- saved_regs[SPARC_O7_REGNUM].realreg = SPARC_I7_REGNUM;
+ saved_regs[regnum].set_realreg (regnum + delta);
+ saved_regs[SPARC_O7_REGNUM].set_realreg (SPARC_I7_REGNUM);
/* The `local' and `in' registers have been saved in the register
save area. */
- addr = saved_regs[SPARC_SP_REGNUM].addr;
+ addr = saved_regs[SPARC_SP_REGNUM].addr ();
addr = get_frame_memory_unsigned (this_frame, addr, 4);
for (regnum = SPARC_L0_REGNUM;
regnum <= SPARC_I7_REGNUM; regnum++, addr += 4)
- saved_regs[regnum].addr = addr;
+ saved_regs[regnum].set_addr (addr);
/* Handle StackGhost. */
{
{
ULONGEST i7;
- addr = saved_regs[SPARC_I7_REGNUM].addr;
+ addr = saved_regs[SPARC_I7_REGNUM].addr ();
i7 = get_frame_memory_unsigned (this_frame, addr, 4);
trad_frame_set_value (saved_regs, SPARC_I7_REGNUM, i7 ^ wcookie);
}
#define PSR_EF 0x00001000
- addr = saved_regs[SPARC32_PSR_REGNUM].addr;
+ addr = saved_regs[SPARC32_PSR_REGNUM].addr ();
psr = get_frame_memory_unsigned (this_frame, addr, 4);
if (psr & PSR_EF)
{
CORE_ADDR sp;
sp = get_frame_register_unsigned (this_frame, SPARC_SP_REGNUM);
- saved_regs[SPARC32_FSR_REGNUM].addr = sp + 96;
+ saved_regs[SPARC32_FSR_REGNUM].set_addr (sp + 96);
for (regnum = SPARC_F0_REGNUM, addr = sp + 96 + 8;
regnum <= SPARC_F31_REGNUM; regnum++, addr += 4)
- saved_regs[regnum].addr = addr;
+ saved_regs[regnum].set_addr (addr);
}
return saved_regs;
(cache->copied_regs_mask & 0x04) ? SPARC_I2_REGNUM : SPARC_O2_REGNUM;
mcontext_addr = get_frame_register_unsigned (this_frame, regnum) + 40;
- cache->saved_regs[SPARC32_PSR_REGNUM].addr = mcontext_addr + 0 * 4;
- cache->saved_regs[SPARC32_PC_REGNUM].addr = mcontext_addr + 1 * 4;
- cache->saved_regs[SPARC32_NPC_REGNUM].addr = mcontext_addr + 2 * 4;
- cache->saved_regs[SPARC32_Y_REGNUM].addr = mcontext_addr + 3 * 4;
+ cache->saved_regs[SPARC32_PSR_REGNUM].set_addr (mcontext_addr + 0 * 4);
+ cache->saved_regs[SPARC32_PC_REGNUM].set_addr (mcontext_addr + 1 * 4);
+ cache->saved_regs[SPARC32_NPC_REGNUM].set_addr (mcontext_addr + 2 * 4);
+ cache->saved_regs[SPARC32_Y_REGNUM].set_addr (mcontext_addr + 3 * 4);
/* Since %g0 is always zero, keep the identity encoding. */
for (regnum = SPARC_G1_REGNUM, addr = mcontext_addr + 4 * 4;
regnum <= SPARC_O7_REGNUM; regnum++, addr += 4)
- cache->saved_regs[regnum].addr = addr;
+ cache->saved_regs[regnum].set_addr (addr);
if (get_frame_memory_unsigned (this_frame, mcontext_addr + 19 * 4, 4))
{
}
else
{
- addr = cache->saved_regs[SPARC_SP_REGNUM].addr;
+ addr = cache->saved_regs[SPARC_SP_REGNUM].addr ();
addr = get_frame_memory_unsigned (this_frame, addr, 4);
for (regnum = SPARC_L0_REGNUM;
regnum <= SPARC_I7_REGNUM; regnum++, addr += 4)
- cache->saved_regs[regnum].addr = addr;
+ cache->saved_regs[regnum].set_addr (addr);
}
return cache;
/* The following registers travel in the `mc_local' slots of
`mcontext_t'. */
addr = mcontext_addr + 16 * 8;
- cache->saved_regs[SPARC64_FPRS_REGNUM].addr = addr + 0 * 8;
- cache->saved_regs[SPARC64_FSR_REGNUM].addr = addr + 1 * 8;
+ cache->saved_regs[SPARC64_FPRS_REGNUM].set_addr (addr + 0 * 8);
+ cache->saved_regs[SPARC64_FSR_REGNUM].set_addr (addr + 1 * 8);
/* The following registers travel in the `mc_in' slots of
`mcontext_t'. */
addr = mcontext_addr + 24 * 8;
- cache->saved_regs[SPARC64_NPC_REGNUM].addr = addr + 0 * 8;
- cache->saved_regs[SPARC64_PC_REGNUM].addr = addr + 1 * 8;
- cache->saved_regs[SPARC64_STATE_REGNUM].addr = addr + 2 * 8;
- cache->saved_regs[SPARC64_Y_REGNUM].addr = addr + 4 * 8;
+ cache->saved_regs[SPARC64_NPC_REGNUM].set_addr (addr + 0 * 8);
+ cache->saved_regs[SPARC64_PC_REGNUM].set_addr (addr + 1 * 8);
+ cache->saved_regs[SPARC64_STATE_REGNUM].set_addr (addr + 2 * 8);
+ cache->saved_regs[SPARC64_Y_REGNUM].set_addr (addr + 4 * 8);
/* The `global' and `out' registers travel in the `mc_global' and
`mc_out' slots of `mcontext_t', except for %g0. Since %g0 is
always zero, keep the identity encoding. */
for (regnum = SPARC_G1_REGNUM, addr = mcontext_addr + 8;
regnum <= SPARC_O7_REGNUM; regnum++, addr += 8)
- cache->saved_regs[regnum].addr = addr;
+ cache->saved_regs[regnum].set_addr (addr);
/* The `local' and `in' registers have been saved in the register
save area. */
- addr = cache->saved_regs[SPARC_SP_REGNUM].addr;
+ addr = cache->saved_regs[SPARC_SP_REGNUM].addr ();
sp = get_frame_memory_unsigned (this_frame, addr, 8);
for (regnum = SPARC_L0_REGNUM, addr = sp + BIAS;
regnum <= SPARC_I7_REGNUM; regnum++, addr += 8)
- cache->saved_regs[regnum].addr = addr;
+ cache->saved_regs[regnum].set_addr (addr);
/* The floating-point registers are only saved if the FEF bit in
%fprs has been set. */
#define FPRS_FEF (1 << 2)
- addr = cache->saved_regs[SPARC64_FPRS_REGNUM].addr;
+ addr = cache->saved_regs[SPARC64_FPRS_REGNUM].addr ();
fprs = get_frame_memory_unsigned (this_frame, addr, 8);
if (fprs & FPRS_FEF)
{
for (regnum = SPARC_F0_REGNUM, addr = mcontext_addr + 32 * 8;
regnum <= SPARC_F31_REGNUM; regnum++, addr += 4)
- cache->saved_regs[regnum].addr = addr;
+ cache->saved_regs[regnum].set_addr (addr);
for (regnum = SPARC64_F32_REGNUM;
regnum <= SPARC64_F62_REGNUM; regnum++, addr += 8)
- cache->saved_regs[regnum].addr = addr;
+ cache->saved_regs[regnum].set_addr (addr);
}
return cache;
return nbsd_pc_in_sigtramp (pc, name);
}
-struct trad_frame_saved_reg *
+trad_frame_saved_reg *
sparc64nbsd_sigcontext_saved_regs (CORE_ADDR sigcontext_addr,
struct frame_info *this_frame)
{
struct gdbarch *gdbarch = get_frame_arch (this_frame);
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
CORE_ADDR addr, sp;
int regnum, delta;
that the part of the signal trampoline that saves the state has
been executed. */
- saved_regs[SPARC_SP_REGNUM].addr = sigcontext_addr + 8;
- saved_regs[SPARC64_PC_REGNUM].addr = sigcontext_addr + 16;
- saved_regs[SPARC64_NPC_REGNUM].addr = sigcontext_addr + 24;
- saved_regs[SPARC64_STATE_REGNUM].addr = sigcontext_addr + 32;
- saved_regs[SPARC_G1_REGNUM].addr = sigcontext_addr + 40;
- saved_regs[SPARC_O0_REGNUM].addr = sigcontext_addr + 48;
+ saved_regs[SPARC_SP_REGNUM].set_addr (sigcontext_addr + 8);
+ saved_regs[SPARC64_PC_REGNUM].set_addr (sigcontext_addr + 16);
+ saved_regs[SPARC64_NPC_REGNUM].set_addr (sigcontext_addr + 24);
+ saved_regs[SPARC64_STATE_REGNUM].set_addr (sigcontext_addr + 32);
+ saved_regs[SPARC_G1_REGNUM].set_addr (sigcontext_addr + 40);
+ saved_regs[SPARC_O0_REGNUM].set_addr (sigcontext_addr + 48);
/* The remaining `global' registers and %y are saved in the `local'
registers. */
delta = SPARC_L0_REGNUM - SPARC_G0_REGNUM;
for (regnum = SPARC_G2_REGNUM; regnum <= SPARC_G7_REGNUM; regnum++)
- saved_regs[regnum].realreg = regnum + delta;
- saved_regs[SPARC64_Y_REGNUM].realreg = SPARC_L1_REGNUM;
+ saved_regs[regnum].set_realreg (regnum + delta);
+ saved_regs[SPARC64_Y_REGNUM].set_realreg (SPARC_L1_REGNUM);
/* The remaining `out' registers can be found in the current frame's
`in' registers. */
delta = SPARC_I0_REGNUM - SPARC_O0_REGNUM;
for (regnum = SPARC_O1_REGNUM; regnum <= SPARC_O5_REGNUM; regnum++)
- saved_regs[regnum].realreg = regnum + delta;
- saved_regs[SPARC_O7_REGNUM].realreg = SPARC_I7_REGNUM;
+ saved_regs[regnum].set_realreg (regnum + delta);
+ saved_regs[SPARC_O7_REGNUM].set_realreg (SPARC_I7_REGNUM);
/* The `local' and `in' registers have been saved in the register
save area. */
- addr = saved_regs[SPARC_SP_REGNUM].addr;
+ addr = saved_regs[SPARC_SP_REGNUM].addr ();
sp = get_frame_memory_unsigned (this_frame, addr, 8);
for (regnum = SPARC_L0_REGNUM, addr = sp + BIAS;
regnum <= SPARC_I7_REGNUM; regnum++, addr += 8)
- saved_regs[regnum].addr = addr;
+ saved_regs[regnum].set_addr (addr);
/* Handle StackGhost. */
{
{
ULONGEST i7;
- addr = saved_regs[SPARC_I7_REGNUM].addr;
+ addr = saved_regs[SPARC_I7_REGNUM].addr ();
i7 = get_frame_memory_unsigned (this_frame, addr, 8);
trad_frame_set_value (saved_regs, SPARC_I7_REGNUM, i7 ^ wcookie);
}
cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
- cache->saved_regs[SPARC64_STATE_REGNUM].addr = trapframe_addr;
- cache->saved_regs[SPARC64_PC_REGNUM].addr = trapframe_addr + 8;
- cache->saved_regs[SPARC64_NPC_REGNUM].addr = trapframe_addr + 16;
+ cache->saved_regs[SPARC64_STATE_REGNUM].set_addr (trapframe_addr);
+ cache->saved_regs[SPARC64_PC_REGNUM].set_addr (trapframe_addr + 8);
+ cache->saved_regs[SPARC64_NPC_REGNUM].set_addr (trapframe_addr + 16);
for (regnum = SPARC_G0_REGNUM; regnum <= SPARC_I7_REGNUM; regnum++)
- cache->saved_regs[regnum].addr =
- trapframe_addr + 48 + (regnum - SPARC_G0_REGNUM) * 8;
+ cache->saved_regs[regnum].set_addr (trapframe_addr + 48
+ + (regnum - SPARC_G0_REGNUM) * 8);
return cache;
}
(cache->copied_regs_mask & 0x04) ? SPARC_I2_REGNUM : SPARC_O2_REGNUM;
mcontext_addr = get_frame_register_unsigned (this_frame, regnum) + 64;
- cache->saved_regs[SPARC64_CCR_REGNUM].addr = mcontext_addr + 0 * 8;
- cache->saved_regs[SPARC64_PC_REGNUM].addr = mcontext_addr + 1 * 8;
- cache->saved_regs[SPARC64_NPC_REGNUM].addr = mcontext_addr + 2 * 8;
- cache->saved_regs[SPARC64_Y_REGNUM].addr = mcontext_addr + 3 * 8;
- cache->saved_regs[SPARC64_ASI_REGNUM].addr = mcontext_addr + 19 * 8;
- cache->saved_regs[SPARC64_FPRS_REGNUM].addr = mcontext_addr + 20 * 8;
+ cache->saved_regs[SPARC64_CCR_REGNUM].set_addr (mcontext_addr + 0 * 8);
+ cache->saved_regs[SPARC64_PC_REGNUM].set_addr (mcontext_addr + 1 * 8);
+ cache->saved_regs[SPARC64_NPC_REGNUM].set_addr (mcontext_addr + 2 * 8);
+ cache->saved_regs[SPARC64_Y_REGNUM].set_addr (mcontext_addr + 3 * 8);
+ cache->saved_regs[SPARC64_ASI_REGNUM].set_addr (mcontext_addr + 19 * 8);
+ cache->saved_regs[SPARC64_FPRS_REGNUM].set_addr (mcontext_addr + 20 * 8);
/* Since %g0 is always zero, keep the identity encoding. */
for (regnum = SPARC_G1_REGNUM, addr = mcontext_addr + 4 * 8;
regnum <= SPARC_O7_REGNUM; regnum++, addr += 8)
- cache->saved_regs[regnum].addr = addr;
+ cache->saved_regs[regnum].set_addr (addr);
if (get_frame_memory_unsigned (this_frame, mcontext_addr + 21 * 8, 8))
{
{
CORE_ADDR sp;
- addr = cache->saved_regs[SPARC_SP_REGNUM].addr;
+ addr = cache->saved_regs[SPARC_SP_REGNUM].addr ();
sp = get_frame_memory_unsigned (this_frame, addr, 8);
for (regnum = SPARC_L0_REGNUM, addr = sp + BIAS;
regnum <= SPARC_I7_REGNUM; regnum++, addr += 8)
- cache->saved_regs[regnum].addr = addr;
+ cache->saved_regs[regnum].set_addr (addr);
}
return cache;
CORE_ADDR start_pc;
/* Table of saved registers. */
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
/* Register state values used by analyze_prologue. */
saved_address. The value of realreg is not
meaningful in this case but it must be >= 0.
See trad-frame.h. */
- cache->saved_regs[saved_register].realreg = saved_register;
- cache->saved_regs[saved_register].addr = saved_address;
+ cache->saved_regs[saved_register].set_realreg (saved_register);
+ cache->saved_regs[saved_register].set_addr (saved_address);
}
else if (cache
&& (operands[0] == TILEGX_SP_REGNUM)
/* Fix up the sign-extension. */
if (opcode->mnemonic == TILEGX_OPC_ADDI)
op2_as_short = op2_as_char;
- prev_sp_value = (cache->saved_regs[hopefully_sp].addr
+ prev_sp_value = (cache->saved_regs[hopefully_sp].addr ()
- op2_as_short);
new_reverse_frame[i].state = REVERSE_STATE_VALUE;
new_reverse_frame[i].value
- = cache->saved_regs[hopefully_sp].addr;
+ = cache->saved_regs[hopefully_sp].addr ();
trad_frame_set_value (cache->saved_regs,
hopefully_sp, prev_sp_value);
}
{
unsigned saved_register = (unsigned) reverse_frame[i].value;
- cache->saved_regs[saved_register].realreg = i;
- cache->saved_regs[saved_register].addr = (LONGEST) -1;
+ cache->saved_regs[saved_register].set_realreg (i);
+ cache->saved_regs[saved_register].set_addr ((LONGEST) -1);
}
}
}
if (lr_saved_on_stack_p)
{
- cache->saved_regs[TILEGX_LR_REGNUM].realreg = TILEGX_LR_REGNUM;
- cache->saved_regs[TILEGX_LR_REGNUM].addr =
- cache->saved_regs[TILEGX_SP_REGNUM].addr;
+ cache->saved_regs[TILEGX_LR_REGNUM].set_realreg (TILEGX_LR_REGNUM);
+ cache->saved_regs[TILEGX_LR_REGNUM].set_addr (cache->saved_regs[TILEGX_SP_REGNUM].addr ());
}
return prolog_end;
{
struct frame_info *this_frame;
CORE_ADDR this_base;
- struct trad_frame_saved_reg *prev_regs;
+ trad_frame_saved_reg *prev_regs;
struct frame_id this_id;
};
void
trad_frame_reset_saved_regs (struct gdbarch *gdbarch,
- struct trad_frame_saved_reg *regs)
+ trad_frame_saved_reg *regs)
{
int numregs = gdbarch_num_cooked_regs (gdbarch);
+
for (int regnum = 0; regnum < numregs; regnum++)
- {
- regs[regnum].realreg = regnum;
- regs[regnum].addr = -1;
- regs[regnum].data = nullptr;
- }
+ regs[regnum].set_realreg (regnum);
}
-struct trad_frame_saved_reg *
+trad_frame_saved_reg *
trad_frame_alloc_saved_regs (struct gdbarch *gdbarch)
{
+ gdb_static_assert (std::is_trivially_default_constructible<trad_frame_saved_reg>::value);
+
int numregs = gdbarch_num_cooked_regs (gdbarch);
- struct trad_frame_saved_reg *this_saved_regs
- = FRAME_OBSTACK_CALLOC (numregs, struct trad_frame_saved_reg);
+ trad_frame_saved_reg *this_saved_regs
+ = FRAME_OBSTACK_CALLOC (numregs, trad_frame_saved_reg);
trad_frame_reset_saved_regs (gdbarch, this_saved_regs);
return this_saved_regs;
non-optimized frames, the technique is reliable (just need to check
for all potential instruction sequences). */
-struct trad_frame_saved_reg *
+trad_frame_saved_reg *
trad_frame_alloc_saved_regs (struct frame_info *this_frame)
{
struct gdbarch *gdbarch = get_frame_arch (this_frame);
return trad_frame_alloc_saved_regs (gdbarch);
}
-enum { TF_REG_VALUE = -1, TF_REG_UNKNOWN = -2, TF_REG_VALUE_BYTES = -3 };
-
int
-trad_frame_value_p (struct trad_frame_saved_reg this_saved_regs[], int regnum)
+trad_frame_value_p (trad_frame_saved_reg this_saved_regs[], int regnum)
{
- return (this_saved_regs[regnum].realreg == TF_REG_VALUE);
+ return this_saved_regs[regnum].is_value ();
}
int
-trad_frame_addr_p (struct trad_frame_saved_reg this_saved_regs[], int regnum)
+trad_frame_addr_p (trad_frame_saved_reg this_saved_regs[], int regnum)
{
- return (this_saved_regs[regnum].realreg >= 0
- && this_saved_regs[regnum].addr != -1);
+ return this_saved_regs[regnum].is_addr ();
}
int
-trad_frame_realreg_p (struct trad_frame_saved_reg this_saved_regs[],
+trad_frame_realreg_p (trad_frame_saved_reg this_saved_regs[],
int regnum)
{
- return (this_saved_regs[regnum].realreg >= 0
- && this_saved_regs[regnum].addr == -1);
+ return this_saved_regs[regnum].is_realreg ();
}
/* See trad-frame.h. */
bool
-trad_frame_value_bytes_p (struct trad_frame_saved_reg this_saved_regs[],
+trad_frame_value_bytes_p (trad_frame_saved_reg this_saved_regs[],
int regnum)
{
- return (this_saved_regs[regnum].realreg == TF_REG_VALUE_BYTES
- && this_saved_regs[regnum].data != nullptr);
+ return this_saved_regs[regnum].is_value_bytes ();
}
void
-trad_frame_set_value (struct trad_frame_saved_reg this_saved_regs[],
+trad_frame_set_value (trad_frame_saved_reg this_saved_regs[],
int regnum, LONGEST val)
{
- /* Make the REALREG invalid, indicating that the ADDR contains the
- register's value. */
- this_saved_regs[regnum].realreg = TF_REG_VALUE;
- this_saved_regs[regnum].addr = val;
+ this_saved_regs[regnum].set_value (val);
}
/* See trad-frame.h. */
void
-trad_frame_set_realreg (struct trad_frame_saved_reg this_saved_regs[],
+trad_frame_set_realreg (trad_frame_saved_reg this_saved_regs[],
int regnum, int realreg)
{
- this_saved_regs[regnum].realreg = realreg;
- this_saved_regs[regnum].addr = -1;
+ this_saved_regs[regnum].set_realreg (realreg);
}
/* See trad-frame.h. */
void
-trad_frame_set_addr (struct trad_frame_saved_reg this_saved_regs[],
+trad_frame_set_addr (trad_frame_saved_reg this_saved_regs[],
int regnum, CORE_ADDR addr)
{
- this_saved_regs[regnum].realreg = regnum;
- this_saved_regs[regnum].addr = addr;
+ this_saved_regs[regnum].set_addr (addr);
}
void
}
void
-trad_frame_set_unknown (struct trad_frame_saved_reg this_saved_regs[],
+trad_frame_set_unknown (trad_frame_saved_reg this_saved_regs[],
int regnum)
{
- /* Make the REALREG invalid, indicating that the value is not known. */
- this_saved_regs[regnum].realreg = TF_REG_UNKNOWN;
- this_saved_regs[regnum].addr = -1;
+ this_saved_regs[regnum].set_unknown ();
}
/* See trad-frame.h. */
void
-trad_frame_set_value_bytes (struct trad_frame_saved_reg this_saved_regs[],
+trad_frame_set_value_bytes (trad_frame_saved_reg this_saved_regs[],
int regnum, const gdb_byte *bytes,
size_t size)
{
- this_saved_regs[regnum].realreg = TF_REG_VALUE_BYTES;
-
/* Allocate the space and copy the data bytes. */
- this_saved_regs[regnum].data = FRAME_OBSTACK_CALLOC (size, gdb_byte);
- memcpy (this_saved_regs[regnum].data, bytes, size);
+ gdb_byte *data = FRAME_OBSTACK_CALLOC (size, gdb_byte);
+ memcpy (data, bytes, size);
+ this_saved_regs[regnum].set_value_bytes (data);
}
/* See trad-frame.h. */
struct value *
trad_frame_get_prev_register (struct frame_info *this_frame,
- struct trad_frame_saved_reg this_saved_regs[],
+ trad_frame_saved_reg this_saved_regs[],
int regnum)
{
if (trad_frame_addr_p (this_saved_regs, regnum))
/* The register was saved in memory. */
return frame_unwind_got_memory (this_frame, regnum,
- this_saved_regs[regnum].addr);
+ this_saved_regs[regnum].addr ());
else if (trad_frame_realreg_p (this_saved_regs, regnum))
return frame_unwind_got_register (this_frame, regnum,
- this_saved_regs[regnum].realreg);
+ this_saved_regs[regnum].realreg ());
else if (trad_frame_value_p (this_saved_regs, regnum))
/* The register's value is available. */
return frame_unwind_got_constant (this_frame, regnum,
- this_saved_regs[regnum].addr);
+ this_saved_regs[regnum].value ());
else if (trad_frame_value_bytes_p (this_saved_regs, regnum))
/* The register's value is available as a sequence of bytes. */
return frame_unwind_got_bytes (this_frame, regnum,
- this_saved_regs[regnum].data);
+ this_saved_regs[regnum].value_bytes ());
else
return frame_unwind_got_optimized (this_frame, regnum);
}
struct frame_info *this_frame,
int regnum);
-/* A traditional saved regs table, indexed by REGNUM, encoding where
- the value of REGNUM for the previous frame can be found in this
- frame.
-
- The table is initialized with an identity encoding (ADDR == -1,
- REALREG == REGNUM) indicating that the value of REGNUM in the
- previous frame can be found in register REGNUM (== REALREG) in this
- frame.
-
- The initial encoding can then be changed:
-
- Modify ADDR (REALREG >= 0, ADDR != -1) to indicate that the value
- of register REGNUM in the previous frame can be found in memory at
- ADDR in this frame (addr_p, !realreg_p, !value_p).
-
- Modify REALREG (REALREG >= 0, ADDR == -1) to indicate that the
- value of register REGNUM in the previous frame is found in register
- REALREG in this frame (!addr_p, realreg_p, !value_p).
-
- Call trad_frame_set_value (REALREG == -1) to indicate that the
- value of register REGNUM in the previous frame is found in ADDR
- (!addr_p, !realreg_p, value_p).
+/* Describes the kind of encoding a stored register has. */
+enum class trad_frame_saved_reg_kind
+{
+ /* Register value is unknown. */
+ UNKNOWN = 0,
+ /* Register value is a constant. */
+ VALUE,
+ /* Register value is in another register. */
+ REALREG,
+ /* Register value is at an address. */
+ ADDR,
+ /* Register value is a sequence of bytes. */
+ VALUE_BYTES
+};
- Call trad_frame_set_unknown (REALREG == -2) to indicate that the
- register's value is not known. */
+/* A struct that describes a saved register in a frame. */
struct trad_frame_saved_reg
{
- LONGEST addr; /* A CORE_ADDR fits in a longest. */
- int realreg;
- /* Register data (for values that don't fit in ADDR). */
- gdb_byte *data;
+ /* Setters */
+
+ /* Encode that the saved register's value is constant VAL in the
+ trad-frame. */
+ void set_value (LONGEST val)
+ {
+ m_kind = trad_frame_saved_reg_kind::VALUE;
+ m_reg.value = val;
+ }
+
+ /* Encode that the saved register's value is stored in register REALREG. */
+ void set_realreg (int realreg)
+ {
+ m_kind = trad_frame_saved_reg_kind::REALREG;
+ m_reg.realreg = realreg;
+ }
+
+ /* Encode that the saved register's value is stored in memory at ADDR. */
+ void set_addr (LONGEST addr)
+ {
+ m_kind = trad_frame_saved_reg_kind::ADDR;
+ m_reg.addr = addr;
+ }
+
+ /* Encode that the saved register's value is unknown. */
+ void set_unknown ()
+ {
+ m_kind = trad_frame_saved_reg_kind::UNKNOWN;
+ }
+
+ /* Encode that the saved register's value is stored as a sequence of bytes.
+ This is useful when the value is larger than what primitive types
+ can hold. */
+ void set_value_bytes (const gdb_byte *value_bytes)
+ {
+ m_kind = trad_frame_saved_reg_kind::VALUE_BYTES;
+ m_reg.value_bytes = value_bytes;
+ }
+
+ /* Getters */
+
+ LONGEST value () const
+ {
+ gdb_assert (m_kind == trad_frame_saved_reg_kind::VALUE);
+ return m_reg.value;
+ }
+
+ int realreg () const
+ {
+ gdb_assert (m_kind == trad_frame_saved_reg_kind::REALREG);
+ return m_reg.realreg;
+ }
+
+ LONGEST addr () const
+ {
+ gdb_assert (m_kind == trad_frame_saved_reg_kind::ADDR);
+ return m_reg.addr;
+ }
+
+ const gdb_byte *value_bytes () const
+ {
+ gdb_assert (m_kind == trad_frame_saved_reg_kind::VALUE_BYTES);
+ return m_reg.value_bytes;
+ }
+
+ /* Convenience functions, return true if the register has been
+ encoded as specified. Return false otherwise. */
+ bool is_value () const
+ {
+ return m_kind == trad_frame_saved_reg_kind::VALUE;
+ }
+
+ bool is_realreg () const
+ {
+ return m_kind == trad_frame_saved_reg_kind::REALREG;
+ }
+
+ bool is_addr () const
+ {
+ return m_kind == trad_frame_saved_reg_kind::ADDR;
+ }
+
+ bool is_unknown () const
+ {
+ return m_kind == trad_frame_saved_reg_kind::UNKNOWN;
+ }
+
+ bool is_value_bytes () const
+ {
+ return m_kind == trad_frame_saved_reg_kind::VALUE_BYTES;
+ }
+
+private:
+
+ trad_frame_saved_reg_kind m_kind;
+
+ union {
+ LONGEST value;
+ int realreg;
+ LONGEST addr;
+ const gdb_byte *value_bytes;
+ } m_reg;
};
/* Encode REGNUM value in the trad-frame. */
-void trad_frame_set_value (struct trad_frame_saved_reg this_saved_regs[],
+void trad_frame_set_value (trad_frame_saved_reg this_saved_regs[],
int regnum, LONGEST val);
/* Encode REGNUM is in REALREG in the trad-frame. */
-void trad_frame_set_realreg (struct trad_frame_saved_reg this_saved_regs[],
+void trad_frame_set_realreg (trad_frame_saved_reg this_saved_regs[],
int regnum, int realreg);
/* Encode REGNUM is at address ADDR in the trad-frame. */
-void trad_frame_set_addr (struct trad_frame_saved_reg this_trad_cache[],
+void trad_frame_set_addr (trad_frame_saved_reg this_trad_cache[],
int regnum, CORE_ADDR addr);
/* Mark REGNUM as unknown. */
-void trad_frame_set_unknown (struct trad_frame_saved_reg this_saved_regs[],
+void trad_frame_set_unknown (trad_frame_saved_reg this_saved_regs[],
int regnum);
/* Encode REGNUM value in the trad-frame as a sequence of bytes. This is
useful when the value is larger than what primitive types can hold. */
-void trad_frame_set_value_bytes (struct trad_frame_saved_reg this_saved_regs[],
+void trad_frame_set_value_bytes (trad_frame_saved_reg this_saved_regs[],
int regnum, const gdb_byte *bytes,
size_t size);
/* Convenience functions, return non-zero if the register has been
encoded as specified. */
-int trad_frame_value_p (struct trad_frame_saved_reg this_saved_regs[],
+int trad_frame_value_p (trad_frame_saved_reg this_saved_regs[],
int regnum);
-int trad_frame_addr_p (struct trad_frame_saved_reg this_saved_regs[],
+int trad_frame_addr_p (trad_frame_saved_reg this_saved_regs[],
int regnum);
-int trad_frame_realreg_p (struct trad_frame_saved_reg this_saved_regs[],
+int trad_frame_realreg_p (trad_frame_saved_reg this_saved_regs[],
int regnum);
/* Return TRUE if REGNUM is stored as a sequence of bytes, and FALSE
otherwise. */
-bool trad_frame_value_bytes_p (struct trad_frame_saved_reg this_saved_regs[],
+bool trad_frame_value_bytes_p (trad_frame_saved_reg this_saved_regs[],
int regnum);
-/* Reset the save regs cache, setting register values to -1. */
+/* Reset the saved regs cache, setting register values to -1. */
void trad_frame_reset_saved_regs (struct gdbarch *gdbarch,
- struct trad_frame_saved_reg *regs);
+ trad_frame_saved_reg *regs);
/* Return a freshly allocated (and initialized) trad_frame array. */
-struct trad_frame_saved_reg *trad_frame_alloc_saved_regs (struct frame_info *);
-struct trad_frame_saved_reg *trad_frame_alloc_saved_regs (struct gdbarch *);
+trad_frame_saved_reg *trad_frame_alloc_saved_regs (struct frame_info *);
+trad_frame_saved_reg *trad_frame_alloc_saved_regs (struct gdbarch *);
/* Given the trad_frame info, return the location of the specified
register. */
struct value *trad_frame_get_prev_register (struct frame_info *this_frame,
- struct trad_frame_saved_reg this_saved_regs[],
+ trad_frame_saved_reg this_saved_regs[],
int regnum);
#endif
int uses_fp;
/* Saved registers. */
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
/* Info gleaned from scanning a function's prologue. */
for (pifsr_tmp = pifsrs; pifsr_tmp != pifsr; pifsr_tmp++)
{
pifsr_tmp->offset -= pi->sp_offset - pifsr_tmp->cur_frameoffset;
- pi->saved_regs[pifsr_tmp->reg].addr = pifsr_tmp->offset;
+ pi->saved_regs[pifsr_tmp->reg].set_addr (pifsr_tmp->offset);
}
return current_pc;
instead of offsets. */
for (i = 0; i < gdbarch_num_regs (gdbarch); i++)
if (trad_frame_addr_p (cache->saved_regs, i))
- cache->saved_regs[i].addr += cache->base;
+ cache->saved_regs[i].set_addr (cache->saved_regs[i].addr ()
+ + cache->base);
/* The call instruction moves the caller's PC in the callee's LP.
Since this is an unwind, do the reverse. Copy the location of LP
if (cache->base == 0)
return;
- *this_id = frame_id_build (cache->saved_regs[E_SP_REGNUM].addr, cache->pc);
+ *this_id = frame_id_build (cache->saved_regs[E_SP_REGNUM].addr (), cache->pc);
}
static const struct frame_unwind v850_frame_unwind = {
CORE_ADDR base;
/* Table of saved registers. */
- struct trad_frame_saved_reg *saved_regs;
+ trad_frame_saved_reg *saved_regs;
};
static struct vax_frame_cache *
mask = get_frame_memory_unsigned (this_frame, cache->base + 4, 4) >> 16;
/* These are always saved. */
- cache->saved_regs[VAX_PC_REGNUM].addr = cache->base + 16;
- cache->saved_regs[VAX_FP_REGNUM].addr = cache->base + 12;
- cache->saved_regs[VAX_AP_REGNUM].addr = cache->base + 8;
- cache->saved_regs[VAX_PS_REGNUM].addr = cache->base + 4;
+ cache->saved_regs[VAX_PC_REGNUM].set_addr (cache->base + 16);
+ cache->saved_regs[VAX_FP_REGNUM].set_addr (cache->base + 12);
+ cache->saved_regs[VAX_AP_REGNUM].set_addr (cache->base + 8);
+ cache->saved_regs[VAX_PS_REGNUM].set_addr (cache->base + 4);
/* Scan the register save mask and record the location of the saved
registers. */
{
if (mask & (1 << regnum))
{
- cache->saved_regs[regnum].addr = addr;
+ cache->saved_regs[regnum].set_addr (addr);
addr += 4;
}
}
projects / binutils-gdb.git / commitdiff