ARM: Update stats for better miscreg support for MP configurations.

diff --git a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/config.ini b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/config.ini
index ee377ad763fec531c3cc328a433cf54bb68a7979..4e7e3ea338c98941d91f4a922bc18fe3b95f571f 100644 (file)
--- a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/config.ini
+++ b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/config.ini
@@ -20,7 +20,7 @@ load_addr_mask=268435455
 machine_type=RealView_PBX
 mem_mode=timing
 memories=system.physmem system.diskmem
-midr_regval=890236928
+midr_regval=890224640
 physmem=system.physmem
 readfile=tests/halt.sh
 symbolfile=

diff --git a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simerr b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simerr
index 2cd67c8dd58a0d979bd33976b95f585d99415541..db9dab60a884716d98db7189d5428bd2910e5309 100755 (executable)
--- a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simerr
+++ b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simerr
@@ -2,6 +2,7 @@ warn: Sockets disabled, not accepting vnc client connections
 warn: Sockets disabled, not accepting terminal connections
 warn: Sockets disabled, not accepting gdb connections
 warn: The clidr register always reports 0 caches.
+warn: clidr LoUIS field of 0b001 to match current ARM implementations.
 warn: The csselr register isn't implemented.
 warn:  instruction 'mcr bpiall' unimplemented
 warn: The ccsidr register isn't implemented and always reads as 0.

diff --git a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout
index f8e4d4f4081f9b0317fc55d9081d07b91a29e2b5..52552fcc1320e02edb178e1d98ca9f73129ef5f6 100755 (executable)
--- a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout
+++ b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout
@@ -1,8 +1,8 @@
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul  8 2011 15:21:58
-gem5 started Jul  9 2011 04:29:24
+gem5 compiled Jul 10 2011 13:16:08
+gem5 started Jul 10 2011 13:18:46
 gem5 executing on u200439-lin.austin.arm.com
 command line: build/ARM_FS/gem5.opt -d build/ARM_FS/tests/opt/long/10.linux-boot/arm/linux/realview-o3 -re tests/run.py build/ARM_FS/tests/opt/long/10.linux-boot/arm/linux/realview-o3
 Global frequency set at 1000000000000 ticks per second

diff --git a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt
index 3395088f8fd86e49f6e6887cae9e4fb548d5e518..dcbaae091d3f240ea0541a8043c8227dacf01aa5 100644 (file)
--- a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt
+++ b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt
@@ -3,10 +3,10 @@
 sim_seconds                                  0.080755                       # Number of seconds simulated
 sim_ticks                                 80755049500                       # Number of ticks simulated
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                  48628                       # Simulator instruction rate (inst/s)
-host_tick_rate                               75697423                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 388920                       # Number of bytes of host memory used
-host_seconds                                  1066.81                       # Real time elapsed on the host
+host_inst_rate                                  42177                       # Simulator instruction rate (inst/s)
+host_tick_rate                               65656485                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 388872                       # Number of bytes of host memory used
+host_seconds                                  1229.96                       # Real time elapsed on the host
 sim_insts                                    51876527                       # Number of instructions simulated
 system.l2c.replacements                         94951                       # number of replacements
 system.l2c.tagsinuse                     38190.664860                       # Cycle average of tags in use
@@ -255,8 +255,8 @@ system.cpu.rename.IQFullEvents                 144597                       # Nu
 system.cpu.rename.LSQFullEvents               2655814                       # Number of times rename has blocked due to LSQ full
 system.cpu.rename.FullRegisterEvents               87                       # Number of times there has been no free registers
 system.cpu.rename.RenamedOperands            79138164                       # Number of destination operands rename has renamed
-system.cpu.rename.RenameLookups             336039003                       # Number of register rename lookups that rename has made
-system.cpu.rename.int_rename_lookups        335972574                       # Number of integer rename lookups
+system.cpu.rename.RenameLookups             336039029                       # Number of register rename lookups that rename has made
+system.cpu.rename.int_rename_lookups        335972600                       # Number of integer rename lookups
 system.cpu.rename.fp_rename_lookups             66429                       # Number of floating rename lookups
 system.cpu.rename.CommittedMaps              51886671                       # Number of HB maps that are committed
 system.cpu.rename.UndoneMaps                 27251492                       # Number of HB maps that are undone due to squashing

diff --git a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/system.terminal b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/system.terminal
index fcb8d1a247ee3d7d1f328ce15d7beeb0af2f5192..334b73543e3230845e8ff375ef31088f078e49ec 100644 (file)
Binary files a/tests/long/10.linux-boot/ref/arm/linux/realview-o3/system.terminal and b/tests/long/10.linux-boot/ref/arm/linux/realview-o3/system.terminal differ