return ((sel >= 128 && sel < 192) || (sel >= 256 && sel < 320));
}
+ bool is_lds_oq(unsigned sel) {
+ return (sel >= 0xdb && sel <= 0xde);
+ }
+
const char * get_hw_class_name();
const char * get_hw_chip_name();
SV_EXEC_MASK,
SV_AR_INDEX,
SV_VALID_MASK,
- SV_GEOMETRY_EMIT
+ SV_GEOMETRY_EMIT,
+ SV_LDS_RW,
+ SV_LDS_OQA,
+ SV_LDS_OQB,
};
class node;
bool is_geometry_emit() {
return is_special_reg() && select == sel_chan(SV_GEOMETRY_EMIT, 0);
}
+ bool is_lds_access() {
+ return is_special_reg() && select == sel_chan(SV_LDS_RW, 0);
+ }
+ bool is_lds_oq() {
+ return is_special_reg() && (select == sel_chan(SV_LDS_OQA, 0) || select == sel_chan(SV_LDS_OQB, 0));
+ }
node* any_def() {
assert(!(def && adef));
return vec_uses_ar(dst) || vec_uses_ar(src);
}
+ bool vec_uses_lds_oq(vvec &vv) {
+ for (vvec::iterator I = vv.begin(), E = vv.end(); I != E; ++I) {
+ value *v = *I;
+ if (v && v->is_lds_oq())
+ return true;
+ }
+ return false;
+ }
+
+ bool consumes_lds_oq() {
+ return vec_uses_lds_oq(src);
+ }
+
+ bool produces_lds_oq() {
+ return vec_uses_lds_oq(dst);
+ }
region_node* get_parent_region();
case SV_EXEC_MASK: o << "EM"; break;
case SV_VALID_MASK: o << "VM"; break;
case SV_GEOMETRY_EMIT: o << "GEOMETRY_EMIT"; break;
+ case SV_LDS_RW: o << "LDS_RW"; break;
+ case SV_LDS_OQA: o << "LDS_OQA"; break;
+ case SV_LDS_OQB: o << "LDS_OQB"; break;
default: o << "???specialreg"; break;
}
break;