(set_attr "mode" "<sseinsnmode>")])
(define_insn "vec_dup<mode>"
- [(set (match_operand:AVX_VEC_DUP_MODE 0 "register_operand" "=x,x,v,x")
+ [(set (match_operand:AVX_VEC_DUP_MODE 0 "register_operand" "=x,x,x,v,x")
(vec_duplicate:AVX_VEC_DUP_MODE
- (match_operand:<ssescalarmode> 1 "nonimmediate_operand" "m,m,v,?x")))]
+ (match_operand:<ssescalarmode> 1 "nonimmediate_operand" "m,m,x,v,?x")))]
"TARGET_AVX"
"@
v<sseintprefix>broadcast<bcstscalarsuff>\t{%1, %0|%0, %1}
vbroadcast<ssescalarmodesuffix>\t{%1, %0|%0, %1}
v<sseintprefix>broadcast<bcstscalarsuff>\t{%x1, %0|%0, %x1}
+ v<sseintprefix>broadcast<bcstscalarsuff>\t{%x1, %g0|%g0, %x1}
#"
[(set_attr "type" "ssemov")
(set_attr "prefix_extra" "1")
(set_attr "prefix" "maybe_evex")
- (set_attr "isa" "avx2,noavx2,avx2,noavx2")
- (set_attr "mode" "<sseinsnmode>,V8SF,<sseinsnmode>,V8SF")])
+ (set_attr "isa" "avx2,noavx2,avx2,avx512f,noavx2")
+ (set_attr "mode" "<sseinsnmode>,V8SF,<sseinsnmode>,<sseinsnmode>,V8SF")])
(define_split
[(set (match_operand:AVX2_VEC_DUP_MODE 0 "register_operand")
--- /dev/null
+! { dg-do compile { target lp64 } }
+
+! { dg-options "-Ofast -mavx512f -ffixed-xmm1 -ffixed-xmm2 -ffixed-xmm3 -ffixed-xmm4 -ffixed-xmm5 -ffixed-xmm6 -ffixed-xmm7 -ffixed-xmm8 -ffixed-xmm9 -ffixed-xmm10 -ffixed-xmm11 -ffixed-xmm12 -ffixed-xmm13 -ffixed-xmm14 -ffixed-xmm15" }
+
+ IMPLICIT REAL*8(A-H,O-Z)
+ ALLOCATABLE DD1(:), DD2(:), WY(:,:)
+ ALLOCATE( DD1(MAX), DD2(MAX), WY(MAX,MAX))
+ DO J = J1,J2
+ DO I = I1, I2
+ DD1(I) = D1 * (WY(I-2,J) - WY(I+2,J) +
+ > (WY(I+1,J) - WY(I-1,J)))
+ END DO
+ DO I = I1, INT(D2 * D3(I))
+ END DO
+ END DO
+ END
+
+! { dg-final { scan-assembler-not "vbroadcastsd\[ \\t\]+%xmm\[0-9\]+, %ymm\[0-9\]+" } }