re PR target/68627 ([i386, AVX-512] Illegal insn generated while compiling spec2k6...
authorKirill Yukhin <kirill.yukhin@intel.com>
Mon, 7 Dec 2015 11:12:41 +0000 (11:12 +0000)
committerKirill Yukhin <kyukhin@gcc.gnu.org>
Mon, 7 Dec 2015 11:12:41 +0000 (11:12 +0000)
PR target/68627

gcc/
* config/i386/sse.md: Make 'v' alternative work on 'avx512f' ISA only.
Force destination to 512 bits register.
gcc/testsuite/
* gfortran.dg/pr68627.f: New test.

From-SVN: r231361

gcc/ChangeLog
gcc/config/i386/sse.md
gcc/testsuite/ChangeLog
gcc/testsuite/gfortran.dg/pr68627.f [new file with mode: 0644]

index 2c7c82356e2a8c4b8ffe6677ca63b0bc685e09fc..4d38d48f571b9d0804878a112466ba9f13793237 100644 (file)
@@ -1,3 +1,9 @@
+2015-12-07  Kirill Yukhin  <kirill.yukhin@intel.com>
+
+       PR target/68627
+       * config/i386/sse.md: Make 'v' alternative work on 'avx512f' ISA only.
+       Force destination to 512 bits register.
+
 2015-12-07  Kirill Yukhin  <kirill.yukhin@intel.com>
 
        PR target/68633
index beddf400460278443852212c45ead7086a8689b1..eb49c419b9e4a2d3caa4db391155ec9b26814f29 100644 (file)
    (set_attr "mode" "<sseinsnmode>")])
 
 (define_insn "vec_dup<mode>"
-  [(set (match_operand:AVX_VEC_DUP_MODE 0 "register_operand" "=x,x,v,x")
+  [(set (match_operand:AVX_VEC_DUP_MODE 0 "register_operand" "=x,x,x,v,x")
        (vec_duplicate:AVX_VEC_DUP_MODE
-         (match_operand:<ssescalarmode> 1 "nonimmediate_operand" "m,m,v,?x")))]
+         (match_operand:<ssescalarmode> 1 "nonimmediate_operand" "m,m,x,v,?x")))]
   "TARGET_AVX"
   "@
    v<sseintprefix>broadcast<bcstscalarsuff>\t{%1, %0|%0, %1}
    vbroadcast<ssescalarmodesuffix>\t{%1, %0|%0, %1}
    v<sseintprefix>broadcast<bcstscalarsuff>\t{%x1, %0|%0, %x1}
+   v<sseintprefix>broadcast<bcstscalarsuff>\t{%x1, %g0|%g0, %x1}
    #"
   [(set_attr "type" "ssemov")
    (set_attr "prefix_extra" "1")
    (set_attr "prefix" "maybe_evex")
-   (set_attr "isa" "avx2,noavx2,avx2,noavx2")
-   (set_attr "mode" "<sseinsnmode>,V8SF,<sseinsnmode>,V8SF")])
+   (set_attr "isa" "avx2,noavx2,avx2,avx512f,noavx2")
+   (set_attr "mode" "<sseinsnmode>,V8SF,<sseinsnmode>,<sseinsnmode>,V8SF")])
 
 (define_split
   [(set (match_operand:AVX2_VEC_DUP_MODE 0 "register_operand")
index 583baa92741ce4503725270847067fddb13f3e88..188ed2b44fbbd6dc23a3dbcd7798d7bcb157a006 100644 (file)
@@ -1,3 +1,8 @@
+2015-12-07  Kirill Yukhin  <kirill.yukhin@intel.com>
+
+       PR target/68627
+       * gfortran.dg/pr68627.f: New test.
+
 2015-12-07  Kirill Yukhin  <kirill.yukhin@intel.com>
 
        PR target/68633
diff --git a/gcc/testsuite/gfortran.dg/pr68627.f b/gcc/testsuite/gfortran.dg/pr68627.f
new file mode 100644 (file)
index 0000000..32ff4a7
--- /dev/null
@@ -0,0 +1,18 @@
+! { dg-do compile { target lp64 } }
+
+! { dg-options "-Ofast -mavx512f -ffixed-xmm1 -ffixed-xmm2 -ffixed-xmm3 -ffixed-xmm4 -ffixed-xmm5 -ffixed-xmm6 -ffixed-xmm7 -ffixed-xmm8 -ffixed-xmm9 -ffixed-xmm10 -ffixed-xmm11 -ffixed-xmm12 -ffixed-xmm13 -ffixed-xmm14 -ffixed-xmm15" }
+
+      IMPLICIT REAL*8(A-H,O-Z)
+      ALLOCATABLE DD1(:), DD2(:), WY(:,:)
+      ALLOCATE( DD1(MAX), DD2(MAX), WY(MAX,MAX))
+         DO J = J1,J2
+            DO I = I1, I2
+               DD1(I) = D1 * (WY(I-2,J) - WY(I+2,J) +
+     >              (WY(I+1,J) - WY(I-1,J)))
+            END DO
+            DO I = I1, INT(D2 * D3(I))
+            END DO
+         END DO
+      END
+
+! { dg-final { scan-assembler-not "vbroadcastsd\[ \\t\]+%xmm\[0-9\]+, %ymm\[0-9\]+" } }