expected number of instructions is 1 (therefore PC after running is 4 not 8)

diff --git a/src/openpower/test/bitmanip/av_cases.py b/src/openpower/test/bitmanip/av_cases.py
index 7e026ea496865b98fa0f4719bd7b271fc2679f75..3d5125147095e0445581add9a131900302fb9343 100644 (file)
--- a/src/openpower/test/bitmanip/av_cases.py
+++ b/src/openpower/test/bitmanip/av_cases.py
@@ -398,7 +398,7 @@ class AVTestCase(TestAccumulatorBase):
         e.intregs[5] = 0x3
         self.add_case(Program(lst, bigendian), initial_regs, expected=e)
 
-    def cse_0_cprop(self):
+    def case_0_cprop(self):
         lst = ["cprop 3, 1, 2" ]
         lst = list(SVP64Asm(lst, bigendian))
         reg_a = 0b000001
@@ -410,7 +410,7 @@ class AVTestCase(TestAccumulatorBase):
         initial_regs[2] = reg_b
         #initial_regs[4] = 0x9
         #initial_regs[5] = 0x3
-        e = ExpectedState(pc=8)
+        e = ExpectedState(pc=4)
         e.intregs[1] = reg_a
         e.intregs[2] = reg_b
         e.intregs[3] = reg_t