Merge branch 'master' into r500test
authorDave Airlie <airlied@linux.ie>
Wed, 16 Apr 2008 10:25:08 +0000 (20:25 +1000)
committerDave Airlie <airlied@linux.ie>
Wed, 16 Apr 2008 10:25:08 +0000 (20:25 +1000)
Conflicts:

src/mesa/drivers/dri/r300/r300_cmdbuf.c
src/mesa/drivers/dri/r300/r300_ioctl.c

1  2 
src/mesa/drivers/dri/r300/r300_cmdbuf.c
src/mesa/drivers/dri/r300/r300_context.h
src/mesa/drivers/dri/r300/r300_ioctl.c
src/mesa/drivers/dri/r300/r300_reg.h
src/mesa/drivers/dri/r300/r300_state.c
src/mesa/drivers/dri/radeon/radeon_chipset.h
src/mesa/drivers/dri/radeon/radeon_screen.c

index d965a95c0f847134e548ed2da62651eb78c95f52,3497738eacf4434cd7ea1bbbb356dc77a4e29545..5d81fcfadf69620a078eddf0792f1b122c5b67eb
@@@ -393,17 -374,10 +393,17 @@@ void r300InitCmdBuf(r300ContextPtr r300
        r300->hw.su_depth_scale.cmd[0] = cmdpacket0(R300_SU_DEPTH_SCALE, 2);
        ALLOC_STATE(rc, always, R300_RC_CMDSIZE, 0);
        r300->hw.rc.cmd[R300_RC_CMD_0] = cmdpacket0(R300_RS_COUNT, 2);
 -      ALLOC_STATE(ri, always, R300_RI_CMDSIZE, 0);
 -      r300->hw.ri.cmd[R300_RI_CMD_0] = cmdpacket0(R300_RS_IP_0, 8);
 -      ALLOC_STATE(rr, variable, R300_RR_CMDSIZE, 0);
 -      r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_INST_0, 1);
 +      if (is_r500) {
 +              ALLOC_STATE(ri, always, R500_RI_CMDSIZE, 0);
 +              r300->hw.ri.cmd[R300_RI_CMD_0] = cmdpacket0(R500_RS_IP_0, 16);
 +              ALLOC_STATE(rr, variable, R300_RR_CMDSIZE, 0);
 +              r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R500_RS_INST_0, 1);
 +      } else {
 +              ALLOC_STATE(ri, always, R300_RI_CMDSIZE, 0);
 +              r300->hw.ri.cmd[R300_RI_CMD_0] = cmdpacket0(R300_RS_IP_0, 8);
 +              ALLOC_STATE(rr, variable, R300_RR_CMDSIZE, 0);
-               r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_ROUTE_0, 1);
++              r300->hw.rr.cmd[R300_RR_CMD_0] = cmdpacket0(R300_RS_INST_0, 1);
 +      }
        ALLOC_STATE(sc_hyperz, always, 3, 0);
        r300->hw.sc_hyperz.cmd[0] = cmdpacket0(R300_SC_HYPERZ, 2);
        ALLOC_STATE(sc_screendoor, always, 2, 0);
index 982882f5b11e350d16c2e77065c4e33997ad0464,780d9aa5d282211963e46b9e28e6cb37e1323a2c..45dafd6bccfa08096bf1633cfc8bd08b78930405
@@@ -330,17 -330,15 +330,17 @@@ struct r300_state_atom 
  #define R300_RI_INTERP_7      8
  #define R300_RI_CMDSIZE               9
  
 +#define R500_RI_CMDSIZE              17
 +
  #define R300_RR_CMD_0         0       /* rr is variable size (at least 1) */
- #define R300_RR_ROUTE_0               1
- #define R300_RR_ROUTE_1               2
- #define R300_RR_ROUTE_2               3
- #define R300_RR_ROUTE_3               4
- #define R300_RR_ROUTE_4               5
- #define R300_RR_ROUTE_5               6
- #define R300_RR_ROUTE_6               7
- #define R300_RR_ROUTE_7               8
+ #define R300_RR_INST_0                1
+ #define R300_RR_INST_1                2
+ #define R300_RR_INST_2                3
+ #define R300_RR_INST_3                4
+ #define R300_RR_INST_4                5
+ #define R300_RR_INST_5                6
+ #define R300_RR_INST_6                7
+ #define R300_RR_INST_7                8
  #define R300_RR_CMDSIZE               9
  
  #define R300_FP_CMD_0         0
index 63555d5f3ad49e8b6025ed352acb06a5cda280d4,1b405889c3c7016b0674bf6e861fb6fbd3d31b26..9f6f2307f56b0c9c15001716c34bb7c884a553ff
@@@ -276,139 -271,49 +276,139 @@@ static void r300EmitClearState(GLcontex
        e32(((dPriv->w * 6) << R300_POINTSIZE_X_SHIFT) |
            ((dPriv->h * 6) << R300_POINTSIZE_Y_SHIFT));
  
 -      R300_STATECHANGE(r300, ri);
 -      reg_start(R300_RS_IP_0, 8);
 -      for (i = 0; i < 8; ++i) {
 -              e32(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3));
 -      }
 +      if (!is_r500) {
 +              R300_STATECHANGE(r300, ri);
 +              reg_start(R300_RS_IP_0, 8);
 +              for (i = 0; i < 8; ++i) {
 +                      e32(R300_RS_SEL_T(1) | R300_RS_SEL_R(2) | R300_RS_SEL_Q(3));
 +              }
  
 -      R300_STATECHANGE(r300, rc);
 -      /* The second constant is needed to get glxgears display anything .. */
 -      reg_start(R300_RS_COUNT, 1);
 -      e32((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN);
 -      e32(0x0);
 +              R300_STATECHANGE(r300, rc);
 +              /* The second constant is needed to get glxgears display anything .. */
 +              reg_start(R300_RS_COUNT, 1);
 +              e32((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN);
 +              e32(0x0);
  
 -      R300_STATECHANGE(r300, rr);
 -      reg_start(R300_RS_INST_0, 0);
 -      e32(R300_RS_INST_COL_CN_WRITE);
 +              R300_STATECHANGE(r300, rr);
-               reg_start(R300_RS_ROUTE_0, 0);
-               e32(R300_RS_ROUTE_0_COLOR);
++              reg_start(R300_RS_INST_0, 0);
++              e32(R300_RS_INST_COL_CN_WRITE);
 +      } else {
 +        
 +              R300_STATECHANGE(r300, ri);
 +              reg_start(R500_RS_IP_0, 8);
 +              for (i = 0; i < 8; ++i) {
 +                      e32((1 << R500_RS_IP_TEX_PTR_T_SHIFT) |
 +                          (2 << R500_RS_IP_TEX_PTR_R_SHIFT) | 
 +                          (3 << R500_RS_IP_TEX_PTR_Q_SHIFT) );
 +              }
  
 -      R300_STATECHANGE(r300, fp);
 -      reg_start(R300_PFS_CNTL_0, 2);
 -      e32(0x0);
 -      e32(0x0);
 -      e32(0x0);
 -      reg_start(R300_PFS_NODE_0, 3);
 -      e32(0x0);
 -      e32(0x0);
 -      e32(0x0);
 -      e32(R300_PFS_NODE_OUTPUT_COLOR);
 +              R300_STATECHANGE(r300, rc);
 +              /* The second constant is needed to get glxgears display anything .. */
 +              reg_start(R300_RS_COUNT, 1);
 +              e32((1 << R300_IC_COUNT_SHIFT) | R300_HIRES_EN);
 +              e32(0x0);
  
 -      R300_STATECHANGE(r300, fpi[0]);
 -      R300_STATECHANGE(r300, fpi[1]);
 -      R300_STATECHANGE(r300, fpi[2]);
 -      R300_STATECHANGE(r300, fpi[3]);
 +              R300_STATECHANGE(r300, rr);
 +              reg_start(R500_RS_INST_0, 0);
 +              e32(R500_RS_INST_COL_CN_WRITE);
  
 -      reg_start(R300_PFS_INSTR0_0, 0);
 -      e32(FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO)));
 +      }
 +
 +      if (!is_r500) {
 +              R300_STATECHANGE(r300, fp);
 +              reg_start(R300_PFS_CNTL_0, 2);
 +              e32(0x0);
 +              e32(0x0);
 +              e32(0x0);
 +              reg_start(R300_PFS_NODE_0, 3);
 +              e32(0x0);
 +              e32(0x0);
 +              e32(0x0);
 +              e32(R300_PFS_NODE_OUTPUT_COLOR);
  
 -      reg_start(R300_PFS_INSTR1_0, 0);
 -      e32(FP_SELC(0, NO, XYZ, FP_TMP(0), 0, 0));
 +              R300_STATECHANGE(r300, fpi[0]);
 +              R300_STATECHANGE(r300, fpi[1]);
 +              R300_STATECHANGE(r300, fpi[2]);
 +              R300_STATECHANGE(r300, fpi[3]);
  
 -      reg_start(R300_PFS_INSTR2_0, 0);
 -      e32(FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO)));
 +              reg_start(R300_PFS_INSTR0_0, 0);
 +              e32(FP_INSTRC(MAD, FP_ARGC(SRC0C_XYZ), FP_ARGC(ONE), FP_ARGC(ZERO)));
  
 -      reg_start(R300_PFS_INSTR3_0, 0);
 -      e32(FP_SELA(0, NO, W, FP_TMP(0), 0, 0));
 +              reg_start(R300_PFS_INSTR1_0, 0);
 +              e32(FP_SELC(0, NO, XYZ, FP_TMP(0), 0, 0));
 +
 +              reg_start(R300_PFS_INSTR2_0, 0);
 +              e32(FP_INSTRA(MAD, FP_ARGA(SRC0A), FP_ARGA(ONE), FP_ARGA(ZERO)));
 +
 +              reg_start(R300_PFS_INSTR3_0, 0);
 +              e32(FP_SELA(0, NO, W, FP_TMP(0), 0, 0));
 +      } else {
 +              R300_STATECHANGE(r300, r500fp);
 +              r500fp_start_fragment(0, 12);
 +
 +              e32(0x7808);
 +              e32(R500_TEX_ID(0) | R500_TEX_INST_LD | R500_TEX_SEM_ACQUIRE | R500_TEX_IGNORE_UNCOVERED);
 +              e32(R500_TEX_SRC_ADDR(0) |  R500_TEX_SRC_S_SWIZ_R |
 +                  R500_TEX_SRC_T_SWIZ_G |
 +                  R500_TEX_DST_ADDR(0) |
 +                  R500_TEX_DST_R_SWIZ_R |
 +                  R500_TEX_DST_G_SWIZ_G |
 +                  R500_TEX_DST_B_SWIZ_B |
 +                  R500_TEX_DST_A_SWIZ_A);
 +              e32(R500_DX_ADDR(0) |
 +                  R500_DX_S_SWIZ_R |
 +                  R500_DX_T_SWIZ_R |
 +                  R500_DX_R_SWIZ_R |
 +                  R500_DX_Q_SWIZ_R |
 +                  R500_DY_ADDR(0) |
 +                  R500_DY_S_SWIZ_R |
 +                  R500_DY_T_SWIZ_R |
 +                  R500_DY_R_SWIZ_R |
 +                  R500_DY_Q_SWIZ_R);
 +              e32(0x0);
 +              e32(0x0);
 +
 +              e32(R500_INST_TYPE_OUT |
 +                  R500_INST_TEX_SEM_WAIT |
 +                  R500_INST_LAST |
 +                  R500_INST_RGB_OMASK_R |
 +                  R500_INST_RGB_OMASK_G |
 +                  R500_INST_RGB_OMASK_B |
 +                  R500_INST_ALPHA_OMASK);
 +
 +              e32(R500_RGB_ADDR0(0) |
 +                  R500_RGB_ADDR1(0) |
 +                  R500_RGB_ADDR1_CONST |
 +                  R500_RGB_ADDR2(0) |
 +                  R500_RGB_ADDR2_CONST |
 +                  R500_RGB_SRCP_OP_1_MINUS_2RGB0);
 +
 +              e32(R500_ALPHA_ADDR0(0) |
 +                  R500_ALPHA_ADDR1(0) |
 +                  R500_ALPHA_ADDR1_CONST |
 +                  R500_ALPHA_ADDR2(0) |
 +                  R500_ALPHA_ADDR2_CONST |
 +                  R500_ALPHA_SRCP_OP_1_MINUS_2A0);
 +
 +              e32(R500_ALU_RGB_SEL_A_SRC0 |
 +                  R500_ALU_RGB_R_SWIZ_A_R |
 +                  R500_ALU_RGB_G_SWIZ_A_G |
 +                  R500_ALU_RGB_B_SWIZ_A_B |
 +                  R500_ALU_RGB_SEL_B_SRC0 |
 +                  R500_ALU_RGB_R_SWIZ_B_1 |
 +                  R500_ALU_RGB_B_SWIZ_B_1 |
 +                  R500_ALU_RGB_G_SWIZ_B_1);
 +
 +              e32(R500_ALPHA_OP_MAD |
 +                  R500_ALPHA_SWIZ_A_A |
 +                  R500_ALPHA_SWIZ_B_1);
 +
 +              e32(R500_ALU_RGBA_OP_MAD |
 +                  R500_ALU_RGBA_R_SWIZ_0 |
 +                  R500_ALU_RGBA_G_SWIZ_0 |
 +                  R500_ALU_RGBA_B_SWIZ_0 |
 +                  R500_ALU_RGBA_A_SWIZ_0);
 +      }
  
        if (has_tcl) {
                R300_STATECHANGE(r300, pvs);
Simple merge