sparc.c (epilogue_renumber): Do not replace %fp with %sp because it can cause the...

	* config/sparc/sparc.c (epilogue_renumber): Do not replace %fp
	with %sp because it can cause the delayed instruction to load
	below the stack.

From-SVN: r47772

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f326c578489471338f538dd21e964ace32c159e2..9485aecaaa6f2c6f441bb68b8fd846d0131db296 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2001-12-07  Stephane Carrez  <Stephane.Carrez@sun.com>
+
+       * config/sparc/sparc.c (epilogue_renumber): Do not replace %fp
+       with %sp because it can cause the delayed instruction to load
+       below the stack.
+
 2001-12-07  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 
        * alpha.c (alpha_expand_unaligned_store,

diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index ec3aa0e86eb720a673a0ef01638794eaa3d3b743..dec8b8c93891772722495e6717d70a146ddfd5f6 100644 (file)
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -5427,6 +5427,30 @@ epilogue_renumber (where, test)
     case CONST_DOUBLE:
       return 0;
 
+      /* Do not replace the frame pointer with the stack pointer because
+        it can cause the delayed instruction to load below the stack.
+        This occurs when instructions like:
+
+        (set (reg/i:SI 24 %i0)
+            (mem/f:SI (plus:SI (reg/f:SI 30 %fp)
+                       (const_int -20 [0xffffffec])) 0))
+
+        are in the return delayed slot.  */
+    case PLUS:
+      if (GET_CODE (XEXP (*where, 0)) == REG
+         && REGNO (XEXP (*where, 0)) == FRAME_POINTER_REGNUM
+         && (GET_CODE (XEXP (*where, 1)) != CONST_INT
+             || INTVAL (XEXP (*where, 1)) < SPARC_STACK_BIAS))
+       return 1;
+      break;
+
+    case MEM:
+      if (SPARC_STACK_BIAS
+         && GET_CODE (XEXP (*where, 0)) == REG
+         && REGNO (XEXP (*where, 0)) == FRAME_POINTER_REGNUM)
+       return 1;
+      break;
+
     default:
       break;
     }