Added eval_select_args() and eval_select_op()
authorClifford Wolf <clifford@clifford.at>
Sun, 8 Feb 2015 17:56:06 +0000 (18:56 +0100)
committerClifford Wolf <clifford@clifford.at>
Sun, 8 Feb 2015 17:56:06 +0000 (18:56 +0100)
kernel/register.h
passes/cmds/select.cc

index 5214dd9a3162e8d3a607a5be713380783dc27c56..9b247172e8cef85127d7f5e290e00a6eaecf3c26 100644 (file)
@@ -100,6 +100,8 @@ struct Backend : Pass
 
 // implemented in passes/cmds/select.cc
 extern void handle_extra_select_args(Pass *pass, std::vector<std::string> args, size_t argidx, size_t args_size, RTLIL::Design *design);
+extern RTLIL::Selection eval_select_args(const vector<string> &args, RTLIL::Design *design);
+extern void eval_select_op(vector<RTLIL::Selection> &work, string &op, RTLIL::Design *design);
 
 extern std::map<std::string, Pass*> pass_register;
 extern std::map<std::string, Frontend*> frontend_register;
index 187db2a8b4bbc21a6025362ef27c082304ef6fdc..f8cfa9ced8026e9e0a60e14cc6e0e88896577e10 100644 (file)
@@ -801,7 +801,7 @@ PRIVATE_NAMESPACE_END
 YOSYS_NAMESPACE_BEGIN
 
 // used in kernel/register.cc and maybe other locations, extern decl. in register.h
-void handle_extra_select_args(Pass *pass, std::vector<std::string> args, size_t argidx, size_t args_size, RTLIL::Design *design)
+void handle_extra_select_args(Pass *pass, vector<string> args, size_t argidx, size_t args_size, RTLIL::Design *design)
 {
        work_stack.clear();
        for (; argidx < args_size; argidx++) {
@@ -817,10 +817,33 @@ void handle_extra_select_args(Pass *pass, std::vector<std::string> args, size_t
                select_op_union(design, work_stack.front(), work_stack.back());
                work_stack.pop_back();
        }
-       if (work_stack.size() > 0)
-               design->selection_stack.push_back(work_stack.back());
-       else
+       if (work_stack.empty())
                design->selection_stack.push_back(RTLIL::Selection(false));
+       else
+               design->selection_stack.push_back(work_stack.back());
+}
+
+// extern decl. in register.h
+RTLIL::Selection eval_select_args(const vector<string> &args, RTLIL::Design *design)
+{
+       work_stack.clear();
+       for (auto &arg : args)
+               select_stmt(design, arg);
+       while (work_stack.size() > 1) {
+               select_op_union(design, work_stack.front(), work_stack.back());
+               work_stack.pop_back();
+       }
+       if (work_stack.empty())
+               return RTLIL::Selection(false);
+       return work_stack.back();
+}
+
+// extern decl. in register.h
+void eval_select_op(vector<RTLIL::Selection> &work, string &op, RTLIL::Design *design)
+{
+       work_stack.swap(work);
+       select_stmt(design, op);
+       work_stack.swap(work);
 }
 
 YOSYS_NAMESPACE_END