Fix and_or_buffer optimization in opt_expr for signed operators
authorClifford Wolf <clifford@clifford.at>
Sat, 1 Jul 2017 14:05:26 +0000 (16:05 +0200)
committerClifford Wolf <clifford@clifford.at>
Sat, 1 Jul 2017 14:05:26 +0000 (16:05 +0200)
passes/opt/opt_expr.cc

index 07cdf465206d98d36fac97874a242fec138ff70f..f9e40869d5c28bbe4343d566a58ca6981eca024b 100644 (file)
@@ -371,13 +371,13 @@ void replace_const_cells(RTLIL::Design *design, RTLIL::Module *module, bool cons
                if (cell->type.in("$reduce_and", "$_AND_"))
                        detect_const_and = true;
 
-               if (cell->type.in("$and", "$logic_and") && GetSize(cell->getPort("\\A")) == 1 && GetSize(cell->getPort("\\B")) == 1)
+               if (cell->type.in("$and", "$logic_and") && GetSize(cell->getPort("\\A")) == 1 && GetSize(cell->getPort("\\B")) == 1 && !cell->getParam("\\A_SIGNED").as_bool())
                        detect_const_and = true;
 
                if (cell->type.in("$reduce_or", "$reduce_bool", "$_OR_"))
                        detect_const_or = true;
 
-               if (cell->type.in("$or", "$logic_or") && GetSize(cell->getPort("\\A")) == 1 && GetSize(cell->getPort("\\B")) == 1)
+               if (cell->type.in("$or", "$logic_or") && GetSize(cell->getPort("\\A")) == 1 && GetSize(cell->getPort("\\B")) == 1 && !cell->getParam("\\A_SIGNED").as_bool())
                        detect_const_or = true;
 
                if (detect_const_and || detect_const_or)