+2017-09-05 Yao Qi <yao.qi@linaro.org>
+
+ * regformats/regdef.h (struct reg): Override operator == and !=.
+
2017-09-05 Yao Qi <yao.qi@linaro.org>
* arch/tdesc.h: New file.
+2017-09-05 Yao Qi <yao.qi@linaro.org>
+
+ * linux-x86-tdesc.c: Include selftest.h.
+ (i386_tdesc_test): New function.
+ (initialize_low_tdesc): Call selftests::register_test.
+ * tdesc.h: Include regdef.h.
+ (target_desc): Override operator == and !=.
+
2017-09-05 Yao Qi <yao.qi@linaro.org>
* configure.srv (srv_tgtobj): Append linux-x86-tdesc.o.
static struct target_desc *i386_tdescs[X86_TDESC_LAST] = { };
+#if defined GDB_SELF_TEST && !defined IN_PROCESS_AGENT
+#include "selftest.h"
+
+namespace selftests {
+namespace tdesc {
+static void
+i386_tdesc_test ()
+{
+ struct
+ {
+ unsigned int mask;
+ const target_desc *tdesc;
+ } tdesc_tests[] = {
+ { X86_XSTATE_X87, tdesc_i386_mmx_linux },
+ { X86_XSTATE_SSE_MASK, tdesc_i386_linux },
+ { X86_XSTATE_AVX_MASK, tdesc_i386_avx_linux },
+ { X86_XSTATE_MPX_MASK, tdesc_i386_mpx_linux },
+ { X86_XSTATE_AVX_MPX_MASK, tdesc_i386_avx_mpx_linux },
+ { X86_XSTATE_AVX_AVX512_MASK, tdesc_i386_avx_avx512_linux },
+ { X86_XSTATE_AVX_MPX_AVX512_PKU_MASK, tdesc_i386_avx_mpx_avx512_pku_linux }
+ };
+
+ for (auto &elem : tdesc_tests)
+ {
+ const target_desc *tdesc = i386_linux_read_description (elem.mask);
+
+ SELF_CHECK (*tdesc == *elem.tdesc);
+ }
+}
+}
+} // namespace selftests
+#endif /* GDB_SELF_TEST */
+
void
initialize_low_tdesc ()
{
init_registers_i386_avx_mpx_linux ();
init_registers_i386_avx_avx512_linux ();
init_registers_i386_avx_mpx_avx512_pku_linux ();
+
+#if GDB_SELF_TEST && !defined IN_PROCESS_AGENT
+ selftests::register_test (selftests::tdesc::i386_tdesc_test);
+#endif
#endif
}
#include "arch/tdesc.h"
-struct reg;
+#include "regdef.h"
typedef struct reg *tdesc_reg_p;
DEF_VEC_P(tdesc_reg_p);
xfree (reg);
VEC_free (tdesc_reg_p, reg_defs);
}
+
+ bool operator== (const target_desc &other) const
+ {
+ if (VEC_length (tdesc_reg_p, reg_defs)
+ != VEC_length (tdesc_reg_p, other.reg_defs))
+ return false;
+
+ struct reg *reg;
+
+ for (int ix = 0;
+ VEC_iterate (tdesc_reg_p, reg_defs, ix, reg);
+ ix++)
+ {
+ struct reg *reg2
+ = VEC_index (tdesc_reg_p, other.reg_defs, ix);
+
+ if (reg != reg2 && *reg != *reg2)
+ return false;
+ }
+
+ /* Compare expedite_regs. */
+ int i = 0;
+ for (; expedite_regs[i] != NULL; i++)
+ {
+ if (strcmp (expedite_regs[i], other.expedite_regs[i]) != 0)
+ return false;
+ }
+ if (other.expedite_regs[i] != NULL)
+ return false;
+
+ if (strcmp (xmltarget, other.xmltarget) != 0)
+ return false;
+
+ return true;
+ }
+
+ bool operator!= (const target_desc &other) const
+ {
+ return !(*this == other);
+ }
#endif
};
/* The size (in bits) of the value of this register, as transmitted. */
int size;
+
+ bool operator== (const reg &other) const
+ {
+ return (strcmp (name, other.name) == 0
+ && offset == other.offset
+ && size == other.size);
+ }
+
+ bool operator!= (const reg &other) const
+ {
+ return !(*this == other);
+ }
};
#endif /* REGDEF_H */