(define_insn ""
[(set (pc)
(if_then_else (match_operator 1 "branch_comparison_operator"
- [(match_operand 2
- "cc_reg_operand" "y")
+ [(match_operand 2 "cc_reg_operand" "y")
(const_int 0)])
- (label_ref (match_operand 0 "" ""))
+ (label_ref (match_operand 0))
(pc)))]
""
- "*
{
- return output_cbranch (operands[1], \"%l0\", 0, insn);
-}"
+ return output_cbranch (operands[1], "%l0", 0, insn);
+}
[(set_attr "type" "branch")])
(define_insn ""
[(set (pc)
(if_then_else (match_operator 0 "branch_comparison_operator"
- [(match_operand 1
- "cc_reg_operand" "y")
+ [(match_operand 1 "cc_reg_operand" "y")
(const_int 0)])
(any_return)
(pc)))]
"<return_pred>"
- "*
{
return output_cbranch (operands[0], NULL, 0, insn);
-}"
+}
[(set_attr "type" "jmpreg")
(set_attr "length" "4")])
(define_insn "jump"
[(set (pc)
- (label_ref (match_operand 0 "" "")))]
+ (label_ref (match_operand 0)))]
""
"b %l0"
[(set_attr "type" "branch")])
[(set_attr "type" "jmpreg")])
(define_expand "indirect_jump"
- [(set (pc) (match_operand 0 "register_operand" ""))])
+ [(set (pc) (match_operand 0 "register_operand"))])
(define_insn "*indirect_jump<mode>"
- [(set (pc) (match_operand:P 0 "register_operand" "c,*l"))]
+ [(set (pc)
+ (match_operand:P 0 "register_operand" "c,*l"))]
""
- "@
- bctr
- blr"
+ "b%T0"
[(set_attr "type" "jmpreg")])
;; Table jump for switch statements:
(define_expand "tablejump"
- [(use (match_operand 0 "" ""))
- (use (label_ref (match_operand 1 "" "")))]
+ [(use (match_operand 0))
+ (use (label_ref (match_operand 1)))]
""
- "
{
if (TARGET_32BIT)
emit_jump_insn (gen_tablejumpsi (operands[0], operands[1]));
else
emit_jump_insn (gen_tablejumpdi (operands[0], operands[1]));
DONE;
-}")
+})
(define_expand "tablejumpsi"
[(set (match_dup 3)
- (plus:SI (match_operand:SI 0 "" "")
+ (plus:SI (match_operand:SI 0)
(match_dup 2)))
- (parallel [(set (pc) (match_dup 3))
- (use (label_ref (match_operand 1 "" "")))])]
+ (parallel [(set (pc)
+ (match_dup 3))
+ (use (label_ref (match_operand 1)))])]
"TARGET_32BIT"
- "
-{ operands[0] = force_reg (SImode, operands[0]);
+{
+ operands[0] = force_reg (SImode, operands[0]);
operands[2] = force_reg (SImode, gen_rtx_LABEL_REF (SImode, operands[1]));
operands[3] = gen_reg_rtx (SImode);
-}")
+})
(define_expand "tablejumpdi"
[(set (match_dup 4)
- (sign_extend:DI (match_operand:SI 0 "lwa_operand" "")))
+ (sign_extend:DI (match_operand:SI 0 "lwa_operand")))
(set (match_dup 3)
(plus:DI (match_dup 4)
(match_dup 2)))
- (parallel [(set (pc) (match_dup 3))
- (use (label_ref (match_operand 1 "" "")))])]
+ (parallel [(set (pc)
+ (match_dup 3))
+ (use (label_ref (match_operand 1)))])]
"TARGET_64BIT"
- "
-{ operands[2] = force_reg (DImode, gen_rtx_LABEL_REF (DImode, operands[1]));
+{
+ operands[2] = force_reg (DImode, gen_rtx_LABEL_REF (DImode, operands[1]));
operands[3] = gen_reg_rtx (DImode);
operands[4] = gen_reg_rtx (DImode);
-}")
+})
(define_insn "*tablejump<mode>_internal1"
[(set (pc)
(match_operand:P 0 "register_operand" "c,*l"))
- (use (label_ref (match_operand 1 "" "")))]
+ (use (label_ref (match_operand 1)))]
""
- "@
- bctr
- blr"
+ "b%T0"
[(set_attr "type" "jmpreg")])
(define_insn "nop"
(define_insn "group_ending_nop"
[(unspec [(const_int 0)] UNSPEC_GRP_END_NOP)]
""
- "*
{
if (rs6000_cpu_attr == CPU_POWER6)
- return \"ori 1,1,0\";
- return \"ori 2,2,0\";
-}")
+ return "ori 1,1,0";
+ return "ori 2,2,0";
+})
\f
;; Define the subtract-one-and-jump insns, starting with the template
;; so loop.c knows what to generate.
(define_expand "doloop_end"
- [(use (match_operand 0 "" "")) ; loop pseudo
- (use (match_operand 1 "" ""))] ; label
+ [(use (match_operand 0)) ; loop pseudo
+ (use (match_operand 1))] ; label
""
- "
{
if (TARGET_64BIT)
{
emit_jump_insn (gen_ctrsi (operands[0], operands[1]));
}
DONE;
-}")
+})
(define_expand "ctr<mode>"
[(parallel [(set (pc)
- (if_then_else (ne (match_operand:P 0 "register_operand" "")
+ (if_then_else (ne (match_operand:P 0 "register_operand")
(const_int 1))
- (label_ref (match_operand 1 "" ""))
+ (label_ref (match_operand 1))
(pc)))
(set (match_dup 0)
(plus:P (match_dup 0)
(const_int -1)))
- (clobber (match_scratch:CC 2 ""))
- (clobber (match_scratch:P 3 ""))])]
+ (clobber (match_scratch:CC 2))
+ (clobber (match_scratch:P 3))])]
""
"")
[(set (pc)
(if_then_else (ne (match_operand:P 1 "register_operand" "c,*b,*b,*b")
(const_int 1))
- (label_ref (match_operand 0 "" ""))
+ (label_ref (match_operand 0))
(pc)))
(set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l")
(plus:P (match_dup 1)
- (const_int -1)))
+ (const_int -1)))
(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
(clobber (match_scratch:P 4 "=X,X,&r,r"))]
""
- "*
{
if (which_alternative != 0)
- return \"#\";
+ return "#";
else if (get_attr_length (insn) == 4)
- return \"bdnz %l0\";
+ return "bdnz %l0";
else
- return \"bdz $+8\;b %l0\";
-}"
+ return "bdz $+8\;b %l0";
+}
[(set_attr "type" "branch")
(set_attr "length" "*,16,20,20")])
[(set (pc)
(if_then_else (eq (match_operand:P 1 "register_operand" "c,*b,*b,*b")
(const_int 1))
- (label_ref (match_operand 0 "" ""))
+ (label_ref (match_operand 0))
(pc)))
(set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l")
(plus:P (match_dup 1)
- (const_int -1)))
+ (const_int -1)))
(clobber (match_scratch:CC 3 "=X,&x,&x,&x"))
(clobber (match_scratch:P 4 "=X,X,&r,r"))]
""
- "*
{
if (which_alternative != 0)
- return \"#\";
+ return "#";
else if (get_attr_length (insn) == 4)
- return \"bdz %l0\";
+ return "bdz %l0";
else
- return \"bdnz $+8\;b %l0\";
-}"
+ return "bdnz $+8\;b %l0";
+}
[(set_attr "type" "branch")
(set_attr "length" "*,16,20,20")])
(define_split
[(set (pc)
(if_then_else (match_operator 2 "comparison_operator"
- [(match_operand:P 1 "gpc_reg_operand" "")
+ [(match_operand:P 1 "gpc_reg_operand")
(const_int 1)])
- (match_operand 5 "" "")
- (match_operand 6 "" "")))
- (set (match_operand:P 0 "int_reg_operand" "")
- (plus:P (match_dup 1) (const_int -1)))
- (clobber (match_scratch:CC 3 ""))
- (clobber (match_scratch:P 4 ""))]
+ (match_operand 5)
+ (match_operand 6)))
+ (set (match_operand:P 0 "int_reg_operand")
+ (plus:P (match_dup 1)
+ (const_int -1)))
+ (clobber (match_scratch:CC 3))
+ (clobber (match_scratch:P 4))]
"reload_completed"
[(set (match_dup 3)
(compare:CC (match_dup 1)
(set (match_dup 0)
(plus:P (match_dup 1)
(const_int -1)))
- (set (pc) (if_then_else (match_dup 7)
- (match_dup 5)
- (match_dup 6)))]
- "
-{ operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[2]), VOIDmode,
- operands[3], const0_rtx); }")
+ (set (pc)
+ (if_then_else (match_dup 7)
+ (match_dup 5)
+ (match_dup 6)))]
+{
+ operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[2]), VOIDmode, operands[3],
+ const0_rtx);
+})
(define_split
[(set (pc)
(if_then_else (match_operator 2 "comparison_operator"
- [(match_operand:P 1 "gpc_reg_operand" "")
+ [(match_operand:P 1 "gpc_reg_operand")
(const_int 1)])
- (match_operand 5 "" "")
- (match_operand 6 "" "")))
- (set (match_operand:P 0 "nonimmediate_operand" "")
- (plus:P (match_dup 1) (const_int -1)))
- (clobber (match_scratch:CC 3 ""))
- (clobber (match_scratch:P 4 ""))]
- "reload_completed && ! gpc_reg_operand (operands[0], SImode)"
+ (match_operand 5)
+ (match_operand 6)))
+ (set (match_operand:P 0 "nonimmediate_operand")
+ (plus:P (match_dup 1)
+ (const_int -1)))
+ (clobber (match_scratch:CC 3))
+ (clobber (match_scratch:P 4))]
+ "reload_completed && !gpc_reg_operand (operands[0], SImode)"
[(set (match_dup 3)
(compare:CC (match_dup 1)
(const_int 1)))
(const_int -1)))
(set (match_dup 0)
(match_dup 4))
- (set (pc) (if_then_else (match_dup 7)
- (match_dup 5)
- (match_dup 6)))]
- "
-{ operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[2]), VOIDmode,
- operands[3], const0_rtx); }")
+ (set (pc)
+ (if_then_else (match_dup 7)
+ (match_dup 5)
+ (match_dup 6)))]
+{
+ operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[2]), VOIDmode, operands[3],
+ const0_rtx);
+})
\f
(define_insn "trap"
[(trap_if (const_int 1) (const_int 0))]