radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY
authorTom Stellard <thomas.stellard@amd.com>
Fri, 18 Apr 2014 14:28:40 +0000 (16:28 +0200)
committerTom Stellard <thomas.stellard@amd.com>
Tue, 29 Apr 2014 22:25:50 +0000 (15:25 -0700)
Igor Gnatenko:
  v2: in define RADEON_INFO_MAX_SCLK use 0x1a instead of 0x19 (upstream changes)

Bruno JimĂ©nez:
  v3: Convert the frequency to MHz from kHz after getting it in
  'do_winsys_init'

Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
src/gallium/drivers/radeon/r600_pipe_common.c
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
src/gallium/winsys/radeon/drm/radeon_winsys.h

index 750886532f219ff403fbd9fd690d9b8f3c18c32b..957186af0b5a10668609376f981a925c08b37720 100644 (file)
@@ -505,6 +505,13 @@ static int r600_get_compute_param(struct pipe_screen *screen,
                }
                return sizeof(uint64_t);
 
+       case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
+               if (ret) {
+                       uint32_t *max_clock_frequency = ret;
+                       *max_clock_frequency = rscreen->info.max_sclk;
+               }
+               return sizeof(uint32_t);
+
        default:
                fprintf(stderr, "unknown PIPE_COMPUTE_CAP %d\n", param);
                return 0;
index b53bebae9932ce7e83e98a627d9d20e2ece4eb35..76183160ddc701993c28a9ca647738d19cce1e16 100644 (file)
@@ -317,6 +317,11 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
     ws->info.gart_size = gem_info.gart_size;
     ws->info.vram_size = gem_info.vram_size;
 
+    /* Get max clock frequency info and convert it to MHz */
+    radeon_get_drm_value(ws->fd, RADEON_INFO_MAX_SCLK, NULL,
+                         &ws->info.max_sclk);
+    ws->info.max_sclk /= 1000;
+
     ws->num_cpus = sysconf(_SC_NPROCESSORS_ONLN);
 
     /* Generation-specific queries. */
index fe0617b682b060984d7c804ee5bd2298cd0adad7..1cb17bb9e017e868786f00920fca0de429690d0b 100644 (file)
@@ -196,6 +196,7 @@ struct radeon_info {
     enum chip_class             chip_class;
     uint32_t                    gart_size;
     uint32_t                    vram_size;
+    uint32_t                    max_sclk;
 
     uint32_t                    drm_major; /* version */
     uint32_t                    drm_minor;