WRITE(REG_A6XX_VPC_UNKNOWN_9101, 0xffff00);
WRITE(REG_A6XX_VPC_UNKNOWN_9107, 0);
- WRITE(REG_A6XX_VPC_UNKNOWN_9236, 1);
+ WRITE(REG_A6XX_VPC_UNKNOWN_9236,
+ A6XX_VPC_UNKNOWN_9236_POINT_COORD_INVERT(0));
WRITE(REG_A6XX_VPC_UNKNOWN_9300, 0);
WRITE(REG_A6XX_VPC_SO_OVERRIDE, A6XX_VPC_SO_OVERRIDE_SO_DISABLE);
memset(vinterp, 0, sizeof(vinterp));
memset(vpsrepl, 0, sizeof(vpsrepl));
- for (int i = 0; i < state->fs_inputs_count; i++) {
- int j = state->fs_inputs[i];
+ for (int j = -1; (j = ir3_next_varying(fs, j)) < (int)fs->inputs_count; ) {
/* NOTE: varyings are packed, so if compmask is 0xb
* then first, third, and fourth component occupy
(fs->inputs[j].rasterflat && emit->rasterflat)) {
uint32_t loc = inloc;
- for (i = 0; i < 4; i++) {
+ for (int i = 0; i < 4; i++) {
if (compmask & (1 << i)) {
vinterp[loc / 16] |= 1 << ((loc % 16) * 2);
loc++;
/* cached state about current emitted shader program (3d): */
struct fd6_streamout_state tf;
- /* index and # of varyings: */
- uint8_t fs_inputs[16];
- uint8_t fs_inputs_count;
-
uint32_t vinterp[8];
};