r300: fix some autostate batch setups

diff --git a/src/mesa/drivers/dri/r300/r300_cmdbuf.c b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
index 779307f5eba772fd690eea2c781c6f46020a3c90..bbc71575950af7461c423dc418bbfc5541b5bf11 100644 (file)
--- a/src/mesa/drivers/dri/r300/r300_cmdbuf.c
+++ b/src/mesa/drivers/dri/r300/r300_cmdbuf.c
@@ -274,23 +274,29 @@ static void emit_tex_offsets(GLcontext *ctx, struct radeon_state_atom * atom)
                int i;
 
                for(i = 0; i < numtmus; ++i) {
-                   BEGIN_BATCH_NO_AUTOSTATE(2);
-                   OUT_BATCH_REGSEQ(R300_TX_OFFSET_0 + (i * 4), 1);
                    radeonTexObj *t = r300->hw.textures[i];
                    if (t && !t->image_override) {
+                           BEGIN_BATCH_NO_AUTOSTATE(4);
+                           OUT_BATCH_REGSEQ(R300_TX_OFFSET_0 + (i * 4), 1);
                            OUT_BATCH_RELOC(t->tile_bits, t->mt->bo, 0,
                                            RADEON_GEM_DOMAIN_VRAM, 0, 0);
+                           END_BATCH();
                    } else if (!t) {
-                           OUT_BATCH(r300->radeon.radeonScreen->texOffset[0]);
+                           assert(0);
                    } else {
                            if (t->bo) {
+                                   BEGIN_BATCH_NO_AUTOSTATE(4);
+                                   OUT_BATCH_REGSEQ(R300_TX_OFFSET_0 + (i * 4), 1);
                                    OUT_BATCH_RELOC(t->tile_bits, t->bo, 0,
                                                    RADEON_GEM_DOMAIN_VRAM, 0, 0);
-                           } else {
+                                   END_BATCH();
+                           } else if (!r300->radeon.radeonScreen->kernel_mm) {
+                                   BEGIN_BATCH_NO_AUTOSTATE(2);
+                                   OUT_BATCH_REGSEQ(R300_TX_OFFSET_0 + (i * 4), 1);
                                    OUT_BATCH(t->override_offset);
+                                   END_BATCH();
                            }
                    }
-                   END_BATCH();
                }
        }
 }

diff --git a/src/mesa/drivers/dri/r300/r300_emit.c b/src/mesa/drivers/dri/r300/r300_emit.c
index a8592440da5f1922dd59a69fe938b02f05a2e2ba..4a18397aa8f5b43c913a489d289634e791945759 100644 (file)
--- a/src/mesa/drivers/dri/r300/r300_emit.c
+++ b/src/mesa/drivers/dri/r300/r300_emit.c
@@ -361,7 +361,7 @@ void r300EmitCacheFlush(r300ContextPtr rmesa)
 {
        BATCH_LOCALS(&rmesa->radeon);
 
-       BEGIN_BATCH(4);
+       BEGIN_BATCH_NO_AUTOSTATE(4);
        OUT_BATCH_REGVAL(R300_RB3D_DSTCACHE_CTLSTAT,
                R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
                R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);

diff --git a/src/mesa/drivers/dri/r300/r300_emit.h b/src/mesa/drivers/dri/r300/r300_emit.h
index 94b0a7ebe80a30159678be23da0a4cc06a9794e5..290bd614c5272aeb92fefe807dc2824c6a35e319 100644 (file)
--- a/src/mesa/drivers/dri/r300/r300_emit.h
+++ b/src/mesa/drivers/dri/r300/r300_emit.h
@@ -151,9 +151,9 @@ void static INLINE end_3d(r300ContextPtr rmesa)
        BATCH_LOCALS(&rmesa->radeon);
 
     if (!rmesa->radeon.radeonScreen->kernel_mm) {
-       BEGIN_BATCH(1);
-           OUT_BATCH(cmdpacify(rmesa->radeon.radeonScreen));
-       END_BATCH();
+        BEGIN_BATCH_NO_AUTOSTATE(1);
+       OUT_BATCH(cmdpacify(rmesa->radeon.radeonScreen));
+       END_BATCH();
     }
 }
 
@@ -162,8 +162,8 @@ void static INLINE cp_delay(r300ContextPtr rmesa, unsigned short count)
        BATCH_LOCALS(&rmesa->radeon);
 
     if (!rmesa->radeon.radeonScreen->kernel_mm) {
-       BEGIN_BATCH(1);
-           OUT_BATCH(cmdcpdelay(rmesa->radeon.radeonScreen, count));
+        BEGIN_BATCH_NO_AUTOSTATE(1);
+       OUT_BATCH(cmdcpdelay(rmesa->radeon.radeonScreen, count));
        END_BATCH();
     }
 }

diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c
index 7af9691cdeeb444e6fad449e816a9843c1457e50..23d068c339928071fdbbd4ea0e087ddd17c1bc32 100644 (file)
--- a/src/mesa/drivers/dri/r300/r300_render.c
+++ b/src/mesa/drivers/dri/r300/r300_render.c
@@ -190,7 +190,7 @@ static void r300FireEB(r300ContextPtr rmesa, int vertex_count, int type)
        BATCH_LOCALS(&rmesa->radeon);
 
        if (vertex_count > 0) {
-               BEGIN_BATCH(8);
+               BEGIN_BATCH(10);
                OUT_BATCH_PACKET3(R300_PACKET3_3D_DRAW_INDX_2, 0);
                OUT_BATCH(R300_VAP_VF_CNTL__PRIM_WALK_INDICES |
                          ((vertex_count + 0) << 16) |
@@ -231,7 +231,7 @@ static void r300EmitAOS(r300ContextPtr rmesa, GLuint nr, GLuint offset)
 
     
        if (!rmesa->radeon.radeonScreen->kernel_mm) {
-               BEGIN_BATCH(sz+2);
+               BEGIN_BATCH(sz+2+(nr * 2));
                OUT_BATCH_PACKET3(R300_PACKET3_3D_LOAD_VBPNTR, sz - 1);
                OUT_BATCH(nr);
 

diff --git a/src/mesa/drivers/dri/radeon/common_cmdbuf.h b/src/mesa/drivers/dri/radeon/common_cmdbuf.h
index d5dece635516d4fd1daddd36349e44866fee36b1..071e29ee023dc0b22b4bd51bc8521994dc868e02 100644 (file)
--- a/src/mesa/drivers/dri/radeon/common_cmdbuf.h
+++ b/src/mesa/drivers/dri/radeon/common_cmdbuf.h
@@ -71,18 +71,17 @@ void rcommonBeginBatch(radeonContextPtr rmesa,
 /**
  * Write a relocated dword to the command buffer.
  */
-#define OUT_BATCH_RELOC(data, bo, offset, rd, wd, flags) \
-       do { \
-        if (0 && offset) {\
-            fprintf(stderr, "(%s:%s:%d) offset : %d\n",\
-            __FILE__, __FUNCTION__, __LINE__, offset);\
-        }\
-        radeon_cs_write_dword(b_l_rmesa->cmdbuf.cs, offset);\
-        radeon_cs_write_reloc(b_l_rmesa->cmdbuf.cs, \
-                              bo, \
-                              rd, \
-                              wd, \
-                              flags);\
+#define OUT_BATCH_RELOC(data, bo, offset, rd, wd, flags)       \
+       do {                                                    \
+        if (0 && offset) {                                     \
+            fprintf(stderr, "(%s:%s:%d) offset : %d\n",                \
+            __FILE__, __FUNCTION__, __LINE__, offset);         \
+        }                                                      \
+        radeon_cs_write_dword(b_l_rmesa->cmdbuf.cs, offset);   \
+        radeon_cs_write_reloc(b_l_rmesa->cmdbuf.cs,            \
+                              bo, rd, wd, flags);              \
+       if (!b_l_rmesa->radeonScreen->kernel_mm)                \
+               b_l_rmesa->cmdbuf.cs->section_cdw += 2;         \
        } while(0)