-LiteX ecosystem would not exist without the collaborative work of contributors! Here is below the
-list of all the LiteDRAM contributors.
+gram is based off the LiteDRAM project, a DRAM controller for LiteX SoCs.
-In the source code, each file list the main authors/contributors:
-- author(s) that created the initial content.
-- contributor(s) that added essential features/improvements.
-
-If you think you should be in this list and don't find yourself, write to florent@enjoy-digital.fr
+If you think you should be in this list and don't find yourself, please send a pull-request
and we'll fix it!
Contributors:
Copyright (c) 2019 Pierre-Olivier Vauboin <po@lambdaconcept>
Copyright (c) 2015 Sebastien Bourdeauducq <sb@m-labs.hk>
Copyright (c) 2016-2016 Tim 'mithro' Ansell <me@mith.ro>
+Copyright (c) 2020 LambdaConcept <contact@lambdaconcept.com>
-# Gram
+# gram
-Gram is an nMigen+LambdaSoC port of the [LiteDRAM]() core by [enjoy-digital](). It currently only targets ECP5+DDR3.
+gram is an nMigen+LambdaSoC port of the [LiteDRAM]() core by [enjoy-digital](). It currently only targets ECP5+DDR3.
## License
+2-clause BSD.