gpu-compute, arch: add some methods to the base inst classes for ISA support

diff --git a/src/arch/hsail/insts/gpu_static_inst.hh b/src/arch/hsail/insts/gpu_static_inst.hh
index 29aab1f707ec1b15fa57198df9b85466e197b41b..6a5ad5003136d65c3028a60ea7b33d83672e90db 100644 (file)
--- a/src/arch/hsail/insts/gpu_static_inst.hh
+++ b/src/arch/hsail/insts/gpu_static_inst.hh
@@ -56,6 +56,7 @@ namespace HsailISA
         void generateDisassembly();
         const std::string &disassemble();
         uint32_t instSize() { return 4; }
+        bool isValid() const override { return true; }
 
       protected:
         HsailCode *hsailCode;

diff --git a/src/gpu-compute/gpu_static_inst.hh b/src/gpu-compute/gpu_static_inst.hh
index c1de28427e19ee52aa8679fd979ddd08d8de93e9..447e1efa3b1274a96bf757ee26ac2bb94ed58e31 100644 (file)
--- a/src/gpu-compute/gpu_static_inst.hh
+++ b/src/gpu-compute/gpu_static_inst.hh
@@ -84,6 +84,8 @@ class GPUStaticInst
     virtual int numDstRegOperands() = 0;
     virtual int numSrcRegOperands() = 0;
 
+    virtual bool isValid() const = 0;
+
     /*
      * Most instructions (including all HSAIL instructions)
      * are vector ops, so _scalarOp will be false by default.
@@ -109,6 +111,13 @@ class GPUStaticInst
         fatal("calling initiateAcc() on a non-memory instruction.\n");
     }
 
+    // only used for memory instructions
+    virtual void
+    completeAcc(GPUDynInstPtr gpuDynInst)
+    {
+        fatal("calling completeAcc() on a non-memory instruction.\n");
+    }
+
     virtual uint32_t getTargetPc() { return 0; }
 
     /**