2001-10-24 Chris Demetriou <cgd@broadcom.com>

        * config/tc-mips.c (hilo_interlocks, cop_interlocks): Make
        these evaluate to true if mips_arch indicates SB-1.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index da68f958cef5458ce895c391d6a5a7b9b9221c83..9ad0f91e3171d913b6d15e08cf9004e48020736b 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2001-10-24  Chris Demetriou  <cgd@broadcom.com>
+
+       * config/tc-mips.c (hilo_interlocks, cop_interlocks): Make
+       these evaluate to true if mips_arch indicates SB-1.
+
 2001-10-23  Alan Modra  <amodra@bigpond.net.au>
 
        * as.c (parse_args): Print the date as well for --version.

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 847ee2c839443f1f571644216243d6ce967e024a..96f13a00c5b464e42054d5203532f7b892f7942b 100644 (file)
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -258,6 +258,7 @@ static int mips_fp32 = 0;
    require nops to be inserted.  */
 
 #define hilo_interlocks (mips_arch == CPU_R4010                       \
+                         || mips_arch == CPU_SB1                      \
                          )
 
 /* Whether the processor uses hardware interlocks to protect reads
@@ -270,6 +271,7 @@ static int mips_fp32 = 0;
    (co-processor) interlocks.  */
 /* Itbl support may require additional care here.  */
 #define cop_interlocks (mips_arch == CPU_R4300                        \
+                        || mips_arch == CPU_SB1                       \
                        )
 
 /* Is this a mfhi or mflo instruction?  */