* simops.c: Fix return address computation for "call" instructions.

diff --git a/sim/mn10300/ChangeLog b/sim/mn10300/ChangeLog
index b18be2317cad661aa940e87bcda5cb0059325262..6a686065937a42a886023ec90fc722dae823a2e7 100644 (file)
--- a/sim/mn10300/ChangeLog
+++ b/sim/mn10300/ChangeLog
@@ -1,3 +1,11 @@
+Tue Jun 10 12:31:32 1997  Jeffrey A Law  (law@cygnus.com)
+
+       * simops.c: Fix return address computation for "call" instructions.
+
+Thu May 22 01:43:11 1997  Jeffrey A Law  (law@cygnus.com)
+
+       * interp.c (sim_open): Fix typo.
+
 Wed May 21 23:27:58 1997  Jeffrey A Law  (law@cygnus.com)
 
        * interp.c (sim_resume): Add missing case in big switch

diff --git a/sim/mn10300/simops.c b/sim/mn10300/simops.c
index 8f86609a6bb6f9c86e67b2e64787a8e605ad7ebf..a913f4cd103858518be6591d87bce91473689230 100644 (file)
--- a/sim/mn10300/simops.c
+++ b/sim/mn10300/simops.c
@@ -2535,7 +2535,7 @@ void OP_CD000000 (insn, extension)
   unsigned long mask;
 
   sp = State.regs[REG_SP];
-  next_pc = State.regs[REG_PC] + 2;
+  next_pc = State.regs[REG_PC] + 5;
   State.mem[sp] = next_pc & 0xff;
   State.mem[sp+1] = (next_pc & 0xff00) >> 8;
   State.mem[sp+2] = (next_pc & 0xff0000) >> 16;
@@ -2601,7 +2601,7 @@ void OP_DD000000 (insn, extension)
   unsigned long mask;
 
   sp = State.regs[REG_SP];
-  next_pc = State.regs[REG_PC] + 2;
+  next_pc = State.regs[REG_PC] + 7;
   State.mem[sp] = next_pc & 0xff;
   State.mem[sp+1] = (next_pc & 0xff00) >> 8;
   State.mem[sp+2] = (next_pc & 0xff0000) >> 16;