i965/miptree: Remove the stencil_as_y_tiled parameter from get_tile_masks
authorJason Ekstrand <jason.ekstrand@intel.com>
Wed, 22 Jun 2016 23:13:42 +0000 (16:13 -0700)
committerJason Ekstrand <jason.ekstrand@intel.com>
Wed, 17 Aug 2016 21:46:22 +0000 (14:46 -0700)
It's only used to stomp the tiling to Y and it's only used by blorp so
there's no reason why blorp can't do it itself.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
src/mesa/drivers/dri/i965/brw_blorp.c
src/mesa/drivers/dri/i965/brw_misc_state.c
src/mesa/drivers/dri/i965/intel_mipmap_tree.c
src/mesa/drivers/dri/i965/intel_mipmap_tree.h

index 282a5b20a944aae775132bf88adf06b6ab0e48c9..e0d9526459412533bd57b097a2c2e809d783208a 100644 (file)
@@ -122,9 +122,11 @@ brw_blorp_compute_tile_offsets(const struct brw_blorp_surface_info *info,
                                uint32_t *tile_x, uint32_t *tile_y)
 {
    uint32_t mask_x, mask_y;
+   uint32_t tiling = info->mt->tiling;
+   if (info->map_stencil_as_y_tiled)
+      tiling = I915_TILING_Y;
 
-   intel_get_tile_masks(info->mt->tiling, info->mt->tr_mode, info->mt->cpp,
-                        info->map_stencil_as_y_tiled,
+   intel_get_tile_masks(tiling, info->mt->tr_mode, info->mt->cpp,
                         &mask_x, &mask_y);
 
    *tile_x = info->x_offset & mask_x;
index c3d341fd1116dbd04267757715b0d70365b02618..cc62dab363f22336b90c1686b774d353d82f6aed 100644 (file)
@@ -177,7 +177,7 @@ brw_get_depthstencil_tile_masks(struct intel_mipmap_tree *depth_mt,
 
    if (depth_mt) {
       intel_get_tile_masks(depth_mt->tiling, depth_mt->tr_mode,
-                           depth_mt->cpp, false,
+                           depth_mt->cpp,
                            &tile_mask_x, &tile_mask_y);
 
       if (intel_miptree_level_has_hiz(depth_mt, depth_level)) {
@@ -185,7 +185,7 @@ brw_get_depthstencil_tile_masks(struct intel_mipmap_tree *depth_mt,
          intel_get_tile_masks(depth_mt->hiz_buf->mt->tiling,
                               depth_mt->hiz_buf->mt->tr_mode,
                               depth_mt->hiz_buf->mt->cpp,
-                              false, &hiz_tile_mask_x,
+                              &hiz_tile_mask_x,
                               &hiz_tile_mask_y);
 
          /* Each HiZ row represents 2 rows of pixels */
@@ -209,7 +209,7 @@ brw_get_depthstencil_tile_masks(struct intel_mipmap_tree *depth_mt,
          intel_get_tile_masks(stencil_mt->tiling,
                               stencil_mt->tr_mode,
                               stencil_mt->cpp,
-                              false, &stencil_tile_mask_x,
+                              &stencil_tile_mask_x,
                               &stencil_tile_mask_y);
 
          tile_mask_x |= stencil_tile_mask_x;
index 8e7c44c96a9201406caa73602f10e42c92242131..6427a984a73e425939d280f31af2012696e7f4e4 100644 (file)
@@ -1232,12 +1232,9 @@ intel_get_tile_dims(uint32_t tiling, uint32_t tr_mode, uint32_t cpp,
  */
 void
 intel_get_tile_masks(uint32_t tiling, uint32_t tr_mode, uint32_t cpp,
-                     bool map_stencil_as_y_tiled,
                      uint32_t *mask_x, uint32_t *mask_y)
 {
    uint32_t tile_w_bytes, tile_h;
-   if (map_stencil_as_y_tiled)
-      tiling = I915_TILING_Y;
 
    intel_get_tile_dims(tiling, tr_mode, cpp, &tile_w_bytes, &tile_h);
 
@@ -1307,7 +1304,7 @@ intel_miptree_get_tile_offsets(const struct intel_mipmap_tree *mt,
    uint32_t x, y;
    uint32_t mask_x, mask_y;
 
-   intel_get_tile_masks(mt->tiling, mt->tr_mode, mt->cpp, false, &mask_x, &mask_y);
+   intel_get_tile_masks(mt->tiling, mt->tr_mode, mt->cpp, &mask_x, &mask_y);
    intel_miptree_get_image_offset(mt, level, slice, &x, &y);
 
    *tile_x = x & mask_x;
index 4388741772ae0efb15c8f80356677f67ece871e0..c28fb3364f6dce3ae511b1e8950b698d8bbde6f8 100644 (file)
@@ -817,7 +817,6 @@ intel_get_image_dims(struct gl_texture_image *image,
 
 void
 intel_get_tile_masks(uint32_t tiling, uint32_t tr_mode, uint32_t cpp,
-                     bool map_stencil_as_y_tiled,
                      uint32_t *mask_x, uint32_t *mask_y);
 
 void