And delete the resulting dead code. This has only been compile-tested.
v2: sed --in-place -e 's/color_logic_ops/gl_logicop_mode/g' $(grep -lr
color_logic_ops src/) suggested by Brian.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
}
ctx->Driver.LineWidth(ctx, ctx->Line.Width);
- ctx->Driver.LogicOpcode(ctx, ctx->Color.LogicOp);
+ ctx->Driver.LogicOpcode(ctx, ctx->Color._LogicOp);
ctx->Driver.PointSize(ctx, ctx->Point.Size);
ctx->Driver.PolygonStipple(ctx, (const GLubyte *) ctx->PolygonStipple);
ctx->Driver.Scissor(ctx);
}
static void
-i830LogicOp(struct gl_context * ctx, GLenum opcode)
+i830LogicOp(struct gl_context * ctx, enum gl_logicop_mode opcode)
{
struct i830_context *i830 = i830_context(ctx);
- int tmp = intel_translate_logic_op(opcode);
DBG("%s\n", __func__);
-
+
+ assert((unsigned)opcode <= 15);
I830_STATECHANGE(i830, I830_UPLOAD_CTX);
i830->state.Ctx[I830_CTXREG_STATE4] &= ~LOGICOP_MASK;
- i830->state.Ctx[I830_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
+ i830->state.Ctx[I830_CTXREG_STATE4] |= opcode;
}
}
static void
-i915LogicOp(struct gl_context * ctx, GLenum opcode)
+i915LogicOp(struct gl_context * ctx, enum gl_logicop_mode opcode)
{
struct i915_context *i915 = I915_CONTEXT(ctx);
- int tmp = intel_translate_logic_op(opcode);
DBG("%s\n", __func__);
-
+
+ assert((unsigned)opcode <= 15);
I915_STATECHANGE(i915, I915_UPLOAD_CTX);
i915->state.Ctx[I915_CTXREG_STATE4] &= ~LOGICOP_MASK;
- i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(tmp);
+ i915->state.Ctx[I915_CTXREG_STATE4] |= LOGIC_OP_FUNC(opcode);
}
extern int intel_translate_compare_func(GLenum func);
extern int intel_translate_stencil_op(GLenum op);
extern int intel_translate_blend_factor(GLenum factor);
-extern int intel_translate_logic_op(GLenum opcode);
void intel_update_renderbuffers(__DRIcontext *context,
__DRIdrawable *drawable);
#define get_time old_get_time
#define intel_translate_blend_factor old_intel_translate_blend_factor
#define intel_translate_compare_func old_intel_translate_compare_func
-#define intel_translate_logic_op old_intel_translate_logic_op
#define intel_translate_shadow_compare_func old_intel_translate_shadow_compare_func
#define intel_translate_stencil_op old_intel_translate_stencil_op
#define intel_init_syncobj_functions old_intel_init_syncobj_functions
fprintf(stderr, "Unknown value in %s: %x\n", __func__, factor);
return BLENDFACT_ZERO;
}
-
-int
-intel_translate_logic_op(GLenum opcode)
-{
- switch (opcode) {
- case GL_CLEAR:
- return LOGICOP_CLEAR;
- case GL_AND:
- return LOGICOP_AND;
- case GL_AND_REVERSE:
- return LOGICOP_AND_RVRSE;
- case GL_COPY:
- return LOGICOP_COPY;
- case GL_COPY_INVERTED:
- return LOGICOP_COPY_INV;
- case GL_AND_INVERTED:
- return LOGICOP_AND_INV;
- case GL_NOOP:
- return LOGICOP_NOOP;
- case GL_XOR:
- return LOGICOP_XOR;
- case GL_OR:
- return LOGICOP_OR;
- case GL_OR_INVERTED:
- return LOGICOP_OR_INV;
- case GL_NOR:
- return LOGICOP_NOR;
- case GL_EQUIV:
- return LOGICOP_EQUIV;
- case GL_INVERT:
- return LOGICOP_INV;
- case GL_OR_REVERSE:
- return LOGICOP_OR_RVRSE;
- case GL_NAND:
- return LOGICOP_NAND;
- case GL_SET:
- return LOGICOP_SET;
- default:
- return LOGICOP_SET;
- }
-}
}
static void
-nouveau_logic_opcode(struct gl_context *ctx, GLenum opcode)
+nouveau_logic_opcode(struct gl_context *ctx, UNUSED enum gl_logicop_mode opcode)
{
context_dirty(ctx, LOGIC_OPCODE);
}
R200_ROP_SET,
};
-static void r200LogicOpCode( struct gl_context *ctx, GLenum opcode )
+static void r200LogicOpCode(struct gl_context *ctx, enum gl_logicop_mode opcode)
{
r200ContextPtr rmesa = R200_CONTEXT(ctx);
- GLuint rop = (GLuint)opcode - GL_CLEAR;
- assert( rop < 16 );
+ assert((unsigned) opcode <= 15);
R200_STATECHANGE( rmesa, msk );
- rmesa->hw.msk.cmd[MSK_RB3D_ROPCNTL] = r200_rop_tab[rop];
+ rmesa->hw.msk.cmd[MSK_RB3D_ROPCNTL] = opcode;
}
/* =============================================================
FALLBACK( rmesa, RADEON_FALLBACK_RENDER_MODE, (mode != GL_RENDER) );
}
-
-static GLuint radeon_rop_tab[] = {
- RADEON_ROP_CLEAR,
- RADEON_ROP_AND,
- RADEON_ROP_AND_REVERSE,
- RADEON_ROP_COPY,
- RADEON_ROP_AND_INVERTED,
- RADEON_ROP_NOOP,
- RADEON_ROP_XOR,
- RADEON_ROP_OR,
- RADEON_ROP_NOR,
- RADEON_ROP_EQUIV,
- RADEON_ROP_INVERT,
- RADEON_ROP_OR_REVERSE,
- RADEON_ROP_COPY_INVERTED,
- RADEON_ROP_OR_INVERTED,
- RADEON_ROP_NAND,
- RADEON_ROP_SET,
-};
-
-static void radeonLogicOpCode( struct gl_context *ctx, GLenum opcode )
+static void radeonLogicOpCode(struct gl_context *ctx, enum gl_logicop_mode opcode)
{
r100ContextPtr rmesa = R100_CONTEXT(ctx);
- GLuint rop = (GLuint)opcode - GL_CLEAR;
- assert( rop < 16 );
+ assert((unsigned) opcode <= 15);
RADEON_STATECHANGE( rmesa, msk );
- rmesa->hw.msk.cmd[MSK_RB3D_ROPCNTL] = radeon_rop_tab[rop];
+ rmesa->hw.msk.cmd[MSK_RB3D_ROPCNTL] = opcode;
}
/* =============================================================
ctx->Color._LogicOp = color_logicop_mapping[opcode & 0x0f];
if (ctx->Driver.LogicOpcode)
- ctx->Driver.LogicOpcode(ctx, opcode);
+ ctx->Driver.LogicOpcode(ctx, ctx->Color._LogicOp);
}
/** Specify the width of rasterized lines */
void (*LineWidth)(struct gl_context *ctx, GLfloat width);
/** Specify a logical pixel operation for color index rendering */
- void (*LogicOpcode)(struct gl_context *ctx, GLenum opcode);
+ void (*LogicOpcode)(struct gl_context *ctx, enum gl_logicop_mode opcode);
void (*PointParameterfv)(struct gl_context *ctx, GLenum pname,
const GLfloat *params);
/** Specify the diameter of rasterized points */