X86: Update ruby stats for stupd change.

diff --git a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/config.ini b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/config.ini
index 14d6997c8ee81616bf3021783f6e11fad69114dd..5985e429a15f267967613d252e9c7d8cc42ad916 100644 (file)
--- a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/config.ini
+++ b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/config.ini
@@ -1,11 +1,13 @@
 [root]
 type=Root
 children=system
-dummy=0
+time_sync_enable=false
+time_sync_period=100000000
+time_sync_spin_threshold=100000
 
 [system]
 type=System
-children=cpu physmem ruby
+children=cpu dir_cntrl0 l1_cntrl0 physmem ruby
 mem_mode=timing
 physmem=system.physmem
 
@@ -32,8 +34,8 @@ progress_interval=0
 system=system
 tracer=system.cpu.tracer
 workload=system.cpu.workload
-dcache_port=system.ruby.network.topology.ext_links0.ext_node.sequencer.port[1]
-icache_port=system.ruby.network.topology.ext_links0.ext_node.sequencer.port[0]
+dcache_port=system.ruby.cpu_ruby_ports.port[1]
+icache_port=system.ruby.cpu_ruby_ports.port[0]
 
 [system.cpu.dtb]
 type=X86TLB
@@ -65,6 +67,59 @@ simpoint=0
 system=system
 uid=100
 
+[system.dir_cntrl0]
+type=Directory_Controller
+children=directory memBuffer
+buffer_size=0
+directory=system.dir_cntrl0.directory
+directory_latency=12
+memBuffer=system.dir_cntrl0.memBuffer
+number_of_TBEs=256
+recycle_latency=10
+transitions_per_cycle=32
+version=0
+
+[system.dir_cntrl0.directory]
+type=RubyDirectoryMemory
+map_levels=4
+numa_high_bit=6
+size=134217728
+use_map=false
+version=0
+
+[system.dir_cntrl0.memBuffer]
+type=RubyMemoryControl
+bank_bit_0=8
+bank_busy_time=11
+bank_queue_size=12
+banks_per_rank=8
+basic_bus_busy_time=2
+dimm_bit_0=12
+dimms_per_channel=2
+mem_bus_cycle_multiplier=10
+mem_ctl_latency=12
+mem_fixed_delay=0
+mem_random_arbitrate=0
+rank_bit_0=11
+rank_rank_delay=1
+ranks_per_dimm=2
+read_write_delay=2
+refresh_period=1560
+tFaw=0
+version=0
+
+[system.l1_cntrl0]
+type=L1Cache_Controller
+buffer_size=0
+cacheMemory=system.ruby.cpu_ruby_ports.dcache
+cache_response_latency=12
+issue_latency=2
+number_of_TBEs=256
+recycle_latency=10
+sequencer=system.ruby.cpu_ruby_ports
+transitions_per_cycle=32
+version=0
+
 [system.physmem]
 type=PhysicalMemory
 file=
@@ -73,14 +128,13 @@ latency_var=0
 null=false
 range=0:134217727
 zero=false
-port=system.ruby.network.topology.ext_links0.ext_node.sequencer.physMemPort
+port=system.ruby.cpu_ruby_ports.physMemPort
 
 [system.ruby]
 type=RubySystem
-children=debug network profiler tracer
+children=cpu_ruby_ports network profiler tracer
 block_size_bytes=64
 clock=1
-debug=system.ruby.debug
 mem_size=134217728
 network=system.ruby.network
 no_mem_vec=false
@@ -90,13 +144,26 @@ randomization=false
 stats_filename=ruby.stats
 tracer=system.ruby.tracer
 
-[system.ruby.debug]
-type=RubyDebug
-filter_string=none
-output_filename=none
-protocol_trace=false
-start_time=1
-verbosity_string=none
+[system.ruby.cpu_ruby_ports]
+type=RubySequencer
+children=dcache
+dcache=system.ruby.cpu_ruby_ports.dcache
+deadlock_threshold=500000
+icache=system.ruby.cpu_ruby_ports.dcache
+max_outstanding_requests=16
+physmem=system.physmem
+using_ruby_tester=false
+version=0
+physMemPort=system.physmem.port[0]
+port=system.cpu.icache_port system.cpu.dcache_port
+
+[system.ruby.cpu_ruby_ports.dcache]
+type=RubyCache
+assoc=2
+latency=3
+replacement_policy=PSEUDO_LRU
+size=256
+start_index_bit=6
 
 [system.ruby.network]
 type=SimpleNetwork
@@ -112,6 +179,7 @@ topology=system.ruby.network.topology
 [system.ruby.network.topology]
 type=Topology
 children=ext_links0 ext_links1 int_links0 int_links1
+description=Crossbar
 ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1
 int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1
 num_int_nodes=3
@@ -119,96 +187,20 @@ print_config=false
 
 [system.ruby.network.topology.ext_links0]
 type=ExtLink
-children=ext_node
 bw_multiplier=64
-ext_node=system.ruby.network.topology.ext_links0.ext_node
+ext_node=system.l1_cntrl0
 int_node=0
 latency=1
 weight=1
 
-[system.ruby.network.topology.ext_links0.ext_node]
-type=L1Cache_Controller
-children=sequencer
-buffer_size=0
-cacheMemory=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
-cache_response_latency=12
-issue_latency=2
-number_of_TBEs=256
-recycle_latency=10
-sequencer=system.ruby.network.topology.ext_links0.ext_node.sequencer
-transitions_per_cycle=32
-version=0
-
-[system.ruby.network.topology.ext_links0.ext_node.sequencer]
-type=RubySequencer
-children=icache
-dcache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
-deadlock_threshold=500000
-icache=system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
-max_outstanding_requests=16
-physmem=system.physmem
-using_ruby_tester=false
-version=0
-physMemPort=system.physmem.port[0]
-port=system.cpu.icache_port system.cpu.dcache_port
-
-[system.ruby.network.topology.ext_links0.ext_node.sequencer.icache]
-type=RubyCache
-assoc=2
-latency=3
-replacement_policy=PSEUDO_LRU
-size=256
-
 [system.ruby.network.topology.ext_links1]
 type=ExtLink
-children=ext_node
 bw_multiplier=64
-ext_node=system.ruby.network.topology.ext_links1.ext_node
+ext_node=system.dir_cntrl0
 int_node=1
 latency=1
 weight=1
 
-[system.ruby.network.topology.ext_links1.ext_node]
-type=Directory_Controller
-children=directory memBuffer
-buffer_size=0
-directory=system.ruby.network.topology.ext_links1.ext_node.directory
-directory_latency=12
-memBuffer=system.ruby.network.topology.ext_links1.ext_node.memBuffer
-number_of_TBEs=256
-recycle_latency=10
-transitions_per_cycle=32
-version=0
-
-[system.ruby.network.topology.ext_links1.ext_node.directory]
-type=RubyDirectoryMemory
-map_levels=4
-numa_high_bit=0
-size=134217728
-use_map=false
-version=0
-
-[system.ruby.network.topology.ext_links1.ext_node.memBuffer]
-type=RubyMemoryControl
-bank_bit_0=8
-bank_busy_time=11
-bank_queue_size=12
-banks_per_rank=8
-basic_bus_busy_time=2
-dimm_bit_0=12
-dimms_per_channel=2
-mem_bus_cycle_multiplier=10
-mem_ctl_latency=12
-mem_fixed_delay=0
-mem_random_arbitrate=0
-rank_bit_0=11
-rank_rank_delay=1
-ranks_per_dimm=2
-read_write_delay=2
-refresh_period=1560
-tFaw=0
-version=0
-
 [system.ruby.network.topology.int_links0]
 type=IntLink
 bw_multiplier=16

diff --git a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats
index 1cc84ea1be328d88e77bf3fbd726e5c2649e2c9f..adfa92f7c6862473300bcef3862d7b2d120f1322 100644 (file)
--- a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats
+++ b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats
@@ -34,7 +34,7 @@ periodic_stats_period: 1000000
 ================ End RubySystem Configuration Print ================
 
 
-Real time: May/06/2010 00:07:43
+Real time: Feb/04/2011 03:47:05
 
 Profiler Stats
 --------------
@@ -43,18 +43,18 @@ Elapsed_time_in_minutes: 0
 Elapsed_time_in_hours: 0
 Elapsed_time_in_days: 0
 
-Virtual_time_in_seconds: 0.2
-Virtual_time_in_minutes: 0.00333333
-Virtual_time_in_hours:   5.55556e-05
-Virtual_time_in_days:    2.31481e-06
+Virtual_time_in_seconds: 0.19
+Virtual_time_in_minutes: 0.00316667
+Virtual_time_in_hours:   5.27778e-05
+Virtual_time_in_days:    2.19907e-06
 
 Ruby_current_time: 276484
 Ruby_start_time: 0
 Ruby_cycles: 276484
 
-mbytes_resident: 35.2148
-mbytes_total: 226.969
-resident_ratio: 0.15517
+mbytes_resident: 38.8594
+mbytes_total: 233.992
+resident_ratio: 0.166088
 
 ruby_cycles_executed: [ 276485 ]
 
@@ -70,9 +70,27 @@ sequencer_requests_outstanding: [binsize: 1 max: 1 count: 8901 average:     1 |
 All Non-Zero Cycle Demand Cache Accesses
 ----------------------------------------
 miss_latency: [binsize: 2 max: 371 count: 8900 average: 30.0656 | standard deviation: 63.8436 | 0 7523 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 9 4 1 3 2 328 243 178 299 187 7 4 1 3 0 8 6 4 9 5 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 6 11 19 16 9 0 1 0 1 1 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 ]
-miss_latency_1: [binsize: 2 max: 369 count: 6910 average: 18.6938 | standard deviation: 50.1996 | 0 6287 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 2 2 0 1 0 158 125 57 116 102 5 3 0 2 0 8 5 3 4 4 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 2 3 8 6 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
-miss_latency_2: [binsize: 2 max: 293 count: 1056 average: 86.3144 | standard deviation: 89.2896 | 0 556 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 5 1 1 1 1 104 47 87 151 61 1 0 0 1 0 0 1 0 4 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 3 1 14 8 2 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
-miss_latency_3: [binsize: 2 max: 371 count: 934 average: 50.6017 | standard deviation: 78.9939 | 0 680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 1 0 1 1 66 71 34 32 24 1 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 8 2 0 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_IFETCH: [binsize: 2 max: 369 count: 6910 average: 18.6938 | standard deviation: 50.1996 | 0 6287 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 2 2 0 1 0 158 125 57 116 102 5 3 0 2 0 8 5 3 4 4 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 2 3 8 6 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_LD: [binsize: 2 max: 293 count: 1056 average: 86.3144 | standard deviation: 89.2896 | 0 556 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 5 1 1 1 1 104 47 87 151 61 1 0 0 1 0 0 1 0 4 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 3 1 14 8 2 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST: [binsize: 2 max: 371 count: 934 average: 50.6017 | standard deviation: 78.9939 | 0 680 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 1 0 1 1 66 71 34 32 24 1 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 8 2 0 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_L1Cache: [binsize: 1 max: 3 count: 7523 average:     3 | standard deviation: 0 | 0 0 0 7523 ]
+miss_latency_Directory: [binsize: 2 max: 371 count: 1377 average: 177.934 | standard deviation: 21.7881 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 9 4 1 3 2 328 243 178 299 187 7 4 1 3 0 8 6 4 9 5 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 0 6 11 19 16 9 0 1 0 1 1 0 1 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 ]
+miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
+imcomplete_wCC_Times: 0
+miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 1 average:     0 | standard deviation: 0 | 1 ]
+miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 1 average:     0 | standard deviation: 0 | 1 ]
+miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 1 average:     0 | standard deviation: 0 | 1 ]
+miss_latency_dir_first_response_to_completion: [binsize: 1 max: 159 count: 1 average:   159 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+imcomplete_dir_Times: 1376
+miss_latency_IFETCH_L1Cache: [binsize: 1 max: 3 count: 6287 average:     3 | standard deviation: 0 | 0 0 0 6287 ]
+miss_latency_IFETCH_Directory: [binsize: 2 max: 369 count: 623 average: 177.067 | standard deviation: 19.4782 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 2 2 0 1 0 158 125 57 116 102 5 3 0 2 0 8 5 3 4 4 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 2 3 8 6 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
+miss_latency_LD_L1Cache: [binsize: 1 max: 3 count: 556 average:     3 | standard deviation: 0 | 0 0 0 556 ]
+miss_latency_LD_Directory: [binsize: 2 max: 293 count: 500 average: 178.96 | standard deviation: 22.8334 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 5 1 1 1 1 104 47 87 151 61 1 0 0 1 0 0 1 0 4 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 3 1 14 8 2 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
+miss_latency_ST_L1Cache: [binsize: 1 max: 3 count: 680 average:     3 | standard deviation: 0 | 0 0 0 680 ]
+miss_latency_ST_Directory: [binsize: 2 max: 371 count: 254 average: 178.039 | standard deviation: 24.8377 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 2 1 0 1 1 66 71 34 32 24 1 1 1 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 8 2 0 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
 
 All Non-Zero Cycle SW Prefetch Requests
 ------------------------------------
@@ -104,15 +122,21 @@ Resource Usage
 page_size: 4096
 user_time: 0
 system_time: 0
-page_reclaims: 10025
-page_faults: 1
+page_reclaims: 11021
+page_faults: 0
 swaps: 0
-block_inputs: 96
-block_outputs: 72
+block_inputs: 0
+block_outputs: 64
 
 Network Stats
 -------------
 
+total_msg_count_Control: 4131 33048
+total_msg_count_Data: 4119 296568
+total_msg_count_Response_Data: 4131 297432
+total_msg_count_Writeback_Control: 4119 32952
+total_msgs: 16500 total_bytes: 660000
+
 switch_0_inlinks: 2
 switch_0_outlinks: 2
 links_utilized_percent_switch_0: 0.155303
@@ -146,60 +170,59 @@ links_utilized_percent_switch_2: 0.248658
   outgoing_messages_switch_2_link_1_Control: 1377 11016 [ 0 0 1377 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_2_link_1_Data: 1373 98856 [ 0 0 1373 0 0 0 0 0 0 0 ] base_latency: 1
 
-Cache Stats: system.ruby.network.topology.ext_links0.ext_node.sequencer.icache
-  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_misses: 1377
-  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_demand_misses: 1377
-  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_prefetches: 0
-  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_sw_prefetches: 0
-  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_total_hw_prefetches: 0
+Cache Stats: system.ruby.cpu_ruby_ports.dcache
+  system.ruby.cpu_ruby_ports.dcache_total_misses: 1377
+  system.ruby.cpu_ruby_ports.dcache_total_demand_misses: 1377
+  system.ruby.cpu_ruby_ports.dcache_total_prefetches: 0
+  system.ruby.cpu_ruby_ports.dcache_total_sw_prefetches: 0
+  system.ruby.cpu_ruby_ports.dcache_total_hw_prefetches: 0
 
-  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_type_LD:   36.3108%
-  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_type_ST:   18.4459%
-  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_type_IFETCH:   45.2433%
+  system.ruby.cpu_ruby_ports.dcache_request_type_LD:   36.3108%
+  system.ruby.cpu_ruby_ports.dcache_request_type_ST:   18.4459%
+  system.ruby.cpu_ruby_ports.dcache_request_type_IFETCH:   45.2433%
 
-  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_access_mode_type_SupervisorMode:   1377    100%
-  system.ruby.network.topology.ext_links0.ext_node.sequencer.icache_request_size: [binsize: 1 max: 8 count: 1377 average: 7.33842 | standard deviation: 1.77003 | 0 57 6 0 119 0 0 0 1195 ]
+  system.ruby.cpu_ruby_ports.dcache_access_mode_type_SupervisorMode:   1377    100%
 
- --- L1Cache 0 ---
+ --- L1Cache ---
  - Event Counts -
-Load  1056
-Ifetch  6910
-Store  934
-Data  1377
-Fwd_GETX  0
-Inv  0
-Replacement  1373
-Writeback_Ack  1373
-Writeback_Nack  0
+Load [1056 ] 1056
+Ifetch [6910 ] 6910
+Store [934 ] 934
+Data [1377 ] 1377
+Fwd_GETX [0 ] 0
+Inv [0 ] 0
+Replacement [1373 ] 1373
+Writeback_Ack [1373 ] 1373
+Writeback_Nack [0 ] 0
 
  - Transitions -
-I  Load  500
-I  Ifetch  623
-I  Store  254
-I  Inv  0 <-- 
-I  Replacement  0 <-- 
+I  Load [500 ] 500
+I  Ifetch [623 ] 623
+I  Store [254 ] 254
+I  Inv [0 ] 0
+I  Replacement [0 ] 0
 
-II  Writeback_Nack  0 <-- 
+II  Writeback_Nack [0 ] 0
 
-M  Load  556
-M  Ifetch  6287
-M  Store  680
-M  Fwd_GETX  0 <-- 
-M  Inv  0 <-- 
-M  Replacement  1373
+M  Load [556 ] 556
+M  Ifetch [6287 ] 6287
+M  Store [680 ] 680
+M  Fwd_GETX [0 ] 0
+M  Inv [0 ] 0
+M  Replacement [1373 ] 1373
 
-MI  Fwd_GETX  0 <-- 
-MI  Inv  0 <-- 
-MI  Writeback_Ack  1373
-MI  Writeback_Nack  0 <-- 
+MI  Fwd_GETX [0 ] 0
+MI  Inv [0 ] 0
+MI  Writeback_Ack [1373 ] 1373
+MI  Writeback_Nack [0 ] 0
 
-MII  Fwd_GETX  0 <-- 
+MII  Fwd_GETX [0 ] 0
 
-IS  Data  1123
+IS  Data [1123 ] 1123
 
-IM  Data  254
+IM  Data [254 ] 254
 
-Memory controller: system.ruby.network.topology.ext_links1.ext_node.memBuffer:
+Memory controller: system.dir_cntrl0.memBuffer:
   memory_total_requests: 2750
   memory_reads: 1377
   memory_writes: 1373
@@ -219,70 +242,69 @@ Memory controller: system.ruby.network.topology.ext_links1.ext_node.memBuffer:
   memory_stalls_for_read_read_turnaround: 0
   accesses_per_bank: 160  144  210  146  196  96  66  38  22  20  184  297  71  124  60  18  84  6  8  14  92  56  14  60  34  58  84  66  42  122  104  54  
 
- --- Directory 0 ---
+ --- Directory ---
  - Event Counts -
-GETX  1377
-GETS  0
-PUTX  1373
-PUTX_NotOwner  0
-DMA_READ  0
-DMA_WRITE  0
-Memory_Data  1377
-Memory_Ack  1373
+GETX [1377 ] 1377
+GETS [0 ] 0
+PUTX [1373 ] 1373
+PUTX_NotOwner [0 ] 0
+DMA_READ [0 ] 0
+DMA_WRITE [0 ] 0
+Memory_Data [1377 ] 1377
+Memory_Ack [1373 ] 1373
 
  - Transitions -
-I  GETX  1377
-I  PUTX_NotOwner  0 <-- 
-I  DMA_READ  0 <-- 
-I  DMA_WRITE  0 <-- 
-
-M  GETX  0 <-- 
-M  PUTX  1373
-M  PUTX_NotOwner  0 <-- 
-M  DMA_READ  0 <-- 
-M  DMA_WRITE  0 <-- 
-
-M_DRD  GETX  0 <-- 
-M_DRD  PUTX  0 <-- 
-
-M_DWR  GETX  0 <-- 
-M_DWR  PUTX  0 <-- 
-
-M_DWRI  GETX  0 <-- 
-M_DWRI  Memory_Ack  0 <-- 
-
-M_DRDI  GETX  0 <-- 
-M_DRDI  Memory_Ack  0 <-- 
-
-IM  GETX  0 <-- 
-IM  GETS  0 <-- 
-IM  PUTX  0 <-- 
-IM  PUTX_NotOwner  0 <-- 
-IM  DMA_READ  0 <-- 
-IM  DMA_WRITE  0 <-- 
-IM  Memory_Data  1377
-
-MI  GETX  0 <-- 
-MI  GETS  0 <-- 
-MI  PUTX  0 <-- 
-MI  PUTX_NotOwner  0 <-- 
-MI  DMA_READ  0 <-- 
-MI  DMA_WRITE  0 <-- 
-MI  Memory_Ack  1373
-
-ID  GETX  0 <-- 
-ID  GETS  0 <-- 
-ID  PUTX  0 <-- 
-ID  PUTX_NotOwner  0 <-- 
-ID  DMA_READ  0 <-- 
-ID  DMA_WRITE  0 <-- 
-ID  Memory_Data  0 <-- 
-
-ID_W  GETX  0 <-- 
-ID_W  GETS  0 <-- 
-ID_W  PUTX  0 <-- 
-ID_W  PUTX_NotOwner  0 <-- 
-ID_W  DMA_READ  0 <-- 
-ID_W  DMA_WRITE  0 <-- 
-ID_W  Memory_Ack  0 <-- 
-
+I  GETX [1377 ] 1377
+I  PUTX_NotOwner [0 ] 0
+I  DMA_READ [0 ] 0
+I  DMA_WRITE [0 ] 0
+
+M  GETX [0 ] 0
+M  PUTX [1373 ] 1373
+M  PUTX_NotOwner [0 ] 0
+M  DMA_READ [0 ] 0
+M  DMA_WRITE [0 ] 0
+
+M_DRD  GETX [0 ] 0
+M_DRD  PUTX [0 ] 0
+
+M_DWR  GETX [0 ] 0
+M_DWR  PUTX [0 ] 0
+
+M_DWRI  GETX [0 ] 0
+M_DWRI  Memory_Ack [0 ] 0
+
+M_DRDI  GETX [0 ] 0
+M_DRDI  Memory_Ack [0 ] 0
+
+IM  GETX [0 ] 0
+IM  GETS [0 ] 0
+IM  PUTX [0 ] 0
+IM  PUTX_NotOwner [0 ] 0
+IM  DMA_READ [0 ] 0
+IM  DMA_WRITE [0 ] 0
+IM  Memory_Data [1377 ] 1377
+
+MI  GETX [0 ] 0
+MI  GETS [0 ] 0
+MI  PUTX [0 ] 0
+MI  PUTX_NotOwner [0 ] 0
+MI  DMA_READ [0 ] 0
+MI  DMA_WRITE [0 ] 0
+MI  Memory_Ack [1373 ] 1373
+
+ID  GETX [0 ] 0
+ID  GETS [0 ] 0
+ID  PUTX [0 ] 0
+ID  PUTX_NotOwner [0 ] 0
+ID  DMA_READ [0 ] 0
+ID  DMA_WRITE [0 ] 0
+ID  Memory_Data [0 ] 0
+
+ID_W  GETX [0 ] 0
+ID_W  GETS [0 ] 0
+ID_W  PUTX [0 ] 0
+ID_W  PUTX_NotOwner [0 ] 0
+ID_W  DMA_READ [0 ] 0
+ID_W  DMA_WRITE [0 ] 0
+ID_W  Memory_Ack
\ No newline at end of file

diff --git a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simout b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simout
index 3b10aa3b9fb2e6fbfa56a926122c58fc329df10c..4e5806bd6ee63ba82b85c5b3c48e1e6d87a3e5b3 100755 (executable)
--- a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simout
+++ b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled May  6 2010 00:07:42
-M5 revision e46d048f7e69 7074 default tip
-M5 started May  6 2010 00:07:43
+M5 compiled Feb  4 2011 03:47:02
+M5 revision afcc4492291f 7892 default qbase qtip rubystatupdate.patch tip
+M5 started Feb  4 2011 03:47:05
 M5 executing on burrito
-command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/quick/00.hello/x86/linux/simple-timing-ruby -re tests/run.py build/X86_SE/tests/fast/quick/00.hello/x86/linux/simple-timing-ruby
+command line: build/X86_SE/m5.opt -d build/X86_SE/tests/opt/quick/00.hello/x86/linux/simple-timing-ruby -re tests/run.py build/X86_SE/tests/opt/quick/00.hello/x86/linux/simple-timing-ruby
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
 Hello world!

diff --git a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt
index 87570dd07ae259b4882c6dd26ba796e2ca99199a..806c6c56a0b9356429f6ad7b0379117e04296902 100644 (file)
--- a/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt
+++ b/tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt
@@ -1,17 +1,17 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                 108748                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 232420                       # Number of bytes of host memory used
+host_inst_rate                                 106685                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 239612                       # Number of bytes of host memory used
 host_seconds                                     0.09                       # Real time elapsed on the host
-host_tick_rate                                3137478                       # Simulator tick rate (ticks/s)
+host_tick_rate                                3002497                       # Simulator tick rate (ticks/s)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-sim_insts                                        9561                       # Number of instructions simulated
+sim_insts                                        9810                       # Number of instructions simulated
 sim_seconds                                  0.000276                       # Number of seconds simulated
 sim_ticks                                      276484                       # Number of ticks simulated
 system.cpu.idle_fraction                            0                       # Percentage of idle cycles
 system.cpu.not_idle_fraction                        1                       # Percentage of non-idle cycles
 system.cpu.numCycles                           276484                       # number of cpu cycles simulated
-system.cpu.num_insts                             9561                       # Number of instructions executed
+system.cpu.num_insts                             9810                       # Number of instructions executed
 system.cpu.num_refs                              1990                       # Number of memory references
 system.cpu.workload.PROG:num_syscalls              11                       # Number of system calls