The following testcase ICEs in cross to riscv64-linux. The problem is
that we have a DImode integral constant (that doesn't fit into SImode),
which is pushed into a constant pool and later access just the first half of
it using a MEM. When plus_constant is called on such a MEM, if the constant
has mode, we verify the mode, but if it doesn't, we don't and ICE later on
when we think the CONST_INT is a valid SImode constant.
2020-03-03 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/94002
* explow.c (plus_constant): Punt if cst has VOIDmode and
get_pool_mode is different from mode.
* gcc.dg/pr94002.c: New test.
+2020-03-03 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/94002
+ * explow.c (plus_constant): Punt if cst has VOIDmode and
+ get_pool_mode is different from mode.
+
2020-03-03 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (leigitimate_small_data_address_p): Check if an
cst = gen_lowpart (mode, cst);
gcc_assert (cst);
}
+ else if (GET_MODE (cst) == VOIDmode
+ && get_pool_mode (XEXP (x, 0)) != mode)
+ break;
if (GET_MODE (cst) == VOIDmode || GET_MODE (cst) == mode)
{
tem = plus_constant (mode, cst, c);
2020-03-03 Jakub Jelinek <jakub@redhat.com>
+ PR rtl-optimization/94002
+ * gcc.dg/pr94002.c: New test.
+
PR tree-optimization/93927
* gcc.c-torture/compile/pr93927-1.c: New test.
* gcc.c-torture/compile/pr93927-2.c: New test.
--- /dev/null
+/* PR rtl-optimization/94002 */
+/* { dg-do compile } */
+/* { dg-options "-O1 -fno-tree-dce -fno-tree-reassoc" } */
+/* { dg-additional-options "-fPIC" { target fpic } } */
+
+unsigned a, b;
+
+void
+foo (void)
+{
+ __builtin_sub_overflow (b, 44852956282LL, &a);
+ a += ~b;
+}