+2017-11-21 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/22464
+ * testsuite/gas/i386/align-1.s: New file.
+ * testsuite/gas/i386/align-1a.d: Likewise.
+ * testsuite/gas/i386/align-1b.d: Likewise.
+ * testsuite/gas/i386/i386.exp: Run align-1a and align-1b.
+
2017-11-21 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/b.d : Update test.
--- /dev/null
+ .text
+_start:
+ movl %edi, %eax
+ .balign 8, 0x90
+ movl $0, %edx
+ .balign 8, 0x90
+ addl %eax, %edx
--- /dev/null
+#name: i386 balign
+#source: align-1.s
+#as: -mtune=generic32
+#objdump: -dr
+
+.*: +file format .*i386.*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+: 89 f8 mov %edi,%eax
+[ ]*[a-f0-9]+: 8d b6 00 00 00 00 lea 0x0\(%esi\),%esi
+[ ]*[a-f0-9]+: ba 00 00 00 00 mov \$0x0,%edx
+[ ]*[a-f0-9]+: 8d 76 00 lea 0x0\(%esi\),%esi
+[ ]*[a-f0-9]+: 01 c2 add %eax,%edx
+#pass
--- /dev/null
+#name: i386 balign (-n)
+#source: align-1.s
+#as: -mtune=generic32 -n
+#objdump: -dr
+
+.*: +file format .*i386.*
+
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+: 89 f8 mov %edi,%eax
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: ba 00 00 00 00 mov \$0x0,%edx
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 90 nop
+[ ]*[a-f0-9]+: 01 c2 add %eax,%edx
+#pass
run_dump_test "notrack"
run_dump_test "notrack-intel"
run_list_test "notrackbad" "-al"
+ run_dump_test "align-1a"
+ run_dump_test "align-1b"
# These tests require support for 8 and 16 bit relocs,
# so we only run them for ELF and COFF targets.