Update expected disassembly of MSP430X instructions now that the disassembler

correcctly interprets an extension word with zero index offsets.

	* gas/msp430/msp430x.d: Update to match revised assembler output.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index bc6ba36ff390a719477ae13069909e6f96c232ce..768c26b0d4fd7d08b5891767f92bd384a7247226 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2014-06-09  Nick Clifton  <nickc@redhat.com>
+
+       * gas/msp430/msp430x.d: Update to match revised assembler output.
+
 2014-06-03  Nick Clifton  <nickc@redhat.com>
 
        * gas/msp430/bad.d: Use -my not -mz.

diff --git a/gas/testsuite/gas/msp430/msp430x.d b/gas/testsuite/gas/msp430/msp430x.d
index e080854497d0879459f5beb6fc32b117ada621f7..6bd6db3d92883628f9ac24f0aa668fd7ed4f6d96 100644 (file)
--- a/gas/testsuite/gas/msp430/msp430x.d
+++ b/gas/testsuite/gas/msp430/msp430x.d
@@ -17,59 +17,59 @@ Disassembly of section .text:
 0+0026 <[^>]*> 40 18 20 59     addx.w  @r9,    r0      ;
 0+002a <[^>]*> 40 18 00 59     addx.w  r9,     r0      ;
 0+002e <[^>]*> 00 18 70 50 00 00       addx.a  #0,     r0      ;
-0+0034 <[^>]*> 00 18 50 52 00 00       addx.a  &0x0000,r0      ;0x0000
+0+0034 <[^>]*> 00 18 50 52 00 00       addx.a  &0x00000,r0     ;
 0+003a <[^>]*> 00 18 70 59     addx.a  @r9\+,  r0      ;
-0+003e <[^>]*> 00 18 50 50 00 00       addx.a  0x0000, r0      ;PC rel. 0x0042
+0+003e <[^>]*> 00 18 50 50 00 00       addx.a  0x00000,r0      ;PC rel. 0x00042
 0+0044 <[^>]*> 40 18 42 51     addx.b  r1,     r2      ;
 0+0048 <[^>]*> 40 18 04 53     addx.w  #0,     r4      ;r3 As==00
 0+004c <[^>]*> 40 18 15 54 00 00       addx.w  0\(r4\),        r5      ;
-0+0052 <[^>]*> 40 18 b6 f0 d2 04 04 00         andx.w  #1234,  4\(r6\) ;#0x04d2
+0+0052 <[^>]*> 40 18 b6 f0 d2 04 04 00         andx.w  #1234,  4\(r6\) ;0x004d2
 0+005a <[^>]*> 40 18 96 f7 04 00 04 00         andx.w  4\(r7\),        4\(r6\) ;
 0+0062 <[^>]*> 40 18 b6 f5 04 00       andx.w  @r5\+,  4\(r6\) ;
-0+0068 <[^>]*> 40 18 96 f0 00 00 04 00         andx.w  0x0000, 4\(r6\) ;PC rel. 0x006c
-0+0070 <[^>]*> 40 18 90 f0 00 00 00 00         andx.w  0x0000, 0x0000  ;PC rel. 0x0074, PC rel. 0x0076
+0+0068 <[^>]*> 40 18 96 f0 00 00 04 00         andx.w  0x00000,4\(r6\) ;PC rel. 0x0006c
+0+0070 <[^>]*> 40 18 90 f0 00 00 00 00         andx.w  0x00000,0x00000 ;PC rel. 0x00074, PC rel. 0x00076
 0+0078 <[^>]*> 00 18 e6 f5 04 00       andx.a  @r5,    4\(r6\) ;
 0+007e <[^>]*> 00 18 c6 f5 04 00       andx.a  r5,     4\(r6\) ;
-0+0084 <[^>]*> 40 18 d6 f2 00 00 04 00         andx.b  &0x0000,4\(r6\) ;0x0000
+0+0084 <[^>]*> 40 18 d6 f2 00 00 04 00         andx.b  &0x00000,4\(r6\)        ;
 0+008c <[^>]*> 40 18 02 f1     andx.w  r1,     r2      ;
-0+0090 <[^>]*> 40 18 3e c0 a0 00       bicx.w  #160,   r14     ;#0x00a0
-0+0096 <[^>]*> 00 18 7e c0 a0 00       bicx.a  #160,   r14     ;#0x00a0
-0+009c <[^>]*> 40 18 7e c0 a0 00       bicx.b  #160,   r14     ;#0x00a0
-0+00a2 <[^>]*> 40 18 3e c0 a0 00       bicx.w  #160,   r14     ;#0x00a0
+0+0090 <[^>]*> 40 18 3e c0 a0 00       bicx.w  #160,   r14     ;0x000a0
+0+0096 <[^>]*> 00 18 7e c0 a0 00       bicx.a  #160,   r14     ;0x000a0
+0+009c <[^>]*> 40 18 7e c0 a0 00       bicx.b  #160,   r14     ;0x000a0
+0+00a2 <[^>]*> 40 18 3e c0 a0 00       bicx.w  #160,   r14     ;0x000a0
 0+00a8 <[^>]*> 40 18 3b d2     bisx.w  #8,     r11     ;r2 As==11
 0+00ac <[^>]*> 00 18 7b d2     bisx.a  #8,     r11     ;r2 As==11
 0+00b0 <[^>]*> 40 18 7b d2     bisx.b  #8,     r11     ;r2 As==11
 0+00b4 <[^>]*> 40 18 3b d2     bisx.w  #8,     r11     ;r2 As==11
-0+00b8 <[^>]*> 40 18 38 b0 14 00       bitx.w  #20,    r8      ;#0x0014
-0+00be <[^>]*> 40 18 92 b2 00 00 00 00         bitx.w  &0x0000,&0x0000 ;0x0000
-0+00c6 <[^>]*> 40 18 18 b2 00 00       bitx.w  &0x0000,r8      ;0x0000
+0+00b8 <[^>]*> 40 18 38 b0 14 00       bitx.w  #20,    r8      ;0x00014
+0+00be <[^>]*> 40 18 92 b2 00 00 00 00         bitx.w  &0x00000,&0x00000;
+0+00c6 <[^>]*> 40 18 18 b2 00 00       bitx.w  &0x00000,r8     ;
 0+00cc <[^>]*> 40 18 18 b5 02 00       bitx.w  2\(r5\),        r8      ;
-0+00d2 <[^>]*> 40 18 92 b1 08 00 00 00         bitx.w  8\(r1\),        &0x0000 ;
-0+00da <[^>]*> 40 18 b2 b5 00 00       bitx.w  @r5\+,  &0x0000 ;
+0+00d2 <[^>]*> 40 18 92 b1 08 00 00 00         bitx.w  8\(r1\),        &0x00000;
+0+00da <[^>]*> 40 18 b2 b5 00 00       bitx.w  @r5\+,  &0x00000;
 0+00e0 <[^>]*> 40 18 38 b5     bitx.w  @r5\+,  r8      ;
 0+00e4 <[^>]*> 40 18 28 b5     bitx.w  @r5,    r8      ;
-0+00e8 <[^>]*> 40 18 92 b0 00 00 00 00         bitx.w  0x0000, &0x0000 ;PC rel. 0x00ec
-0+00f0 <[^>]*> 40 18 f2 b0 0c 00 00 00         bitx.b  #12,    &0x0000 ;#0x000c
-0+00f8 <[^>]*> 40 18 e2 b5 00 00       bitx.b  @r5,    &0x0000 ;
-0+00fe <[^>]*> 40 18 58 b0 00 00       bitx.b  0x0000, r8      ;PC rel. 0x0102
+0+00e8 <[^>]*> 40 18 92 b0 00 00 00 00         bitx.w  0x00000,&0x00000;PC rel. 0x000ec
+0+00f0 <[^>]*> 40 18 f2 b0 0c 00 00 00         bitx.b  \#12,   &0x00000;0x0000c
+0+00f8 <[^>]*> 40 18 e2 b5 00 00       bitx.b  @r5,    &0x00000;
+0+00fe <[^>]*> 40 18 58 b0 00 00       bitx.b  0x00000,r8      ;PC rel. 0x00102
 0+0104 <[^>]*> 40 18 48 b5     bitx.b  r5,     r8      ;
-0+0108 <[^>]*> 40 18 82 b5 00 00       bitx.w  r5,     &0x0000 ;
-0+010e <[^>]*> 40 18 80 43 00 00       movx.w  #0,     0x0000  ;r3 As==00, PC rel. 0x0112
-0+0114 <[^>]*> 00 18 c0 43 00 00       movx.a  #0,     0x0000  ;r3 As==00, PC rel. 0x0118
-0+011a <[^>]*> 40 18 c0 43 00 00       movx.b  #0,     0x0000  ;r3 As==00, PC rel. 0x011e
-0+0120 <[^>]*> 40 18 80 43 00 00       movx.w  #0,     0x0000  ;r3 As==00, PC rel. 0x0124
+0+0108 <[^>]*> 40 18 82 b5 00 00       bitx.w  r5,     &0x00000;
+0+010e <[^>]*> 40 18 80 43 00 00       movx.w  #0,     0x00000 ;r3 As==00, PC rel. 0x00112
+0+0114 <[^>]*> 00 18 c0 43 00 00       movx.a  #0,     0x00000 ;r3 As==00, PC rel. 0x00118
+0+011a <[^>]*> 40 18 c0 43 00 00       movx.b  #0,     0x00000 ;r3 As==00, PC rel. 0x0011e
+0+0120 <[^>]*> 40 18 80 43 00 00       movx.w  #0,     0x00000 ;r3 As==00, PC rel. 0x00124
 0+0126 <[^>]*> 40 18 0f 93     cmpx.w  #0,     r15     ;r3 As==00
-0+012a <[^>]*> 00 18 f0 90 00 18 00 00         cmpx.a  #6144,  0x0000  ;#0x1800, PC rel. 0x0130
+0+012a <[^>]*> 00 18 f0 90 00 18 00 00         cmpx.a  #6144,  0x00000 ;0x01800, PC rel. 0x00130
 0+0132 <[^>]*> 40 18 6f 91     cmpx.b  @r1,    r15     ;
-0+0136 <[^>]*> 40 18 b2 92 00 00       cmpx.w  #8,     &0x0000 ;r2 As==11
+0+0136 <[^>]*> 40 18 b2 92 00 00       cmpx.w  #8,     &0x00000;r2 As==11
 0+013c <[^>]*> 40 18 80 a3 00 00       dadcx.w 0x0000          ;PC rel. abs addr 0x0140
 0+0142 <[^>]*> 00 18 cc a3 00 00       dadcx.a 0\(r12\)                ;
 0+0148 <[^>]*> 40 18 c0 a3 00 00       dadcx.b 0x0000          ;PC rel. abs addr 0x014c
 0+014e <[^>]*> 40 18 0c a3     dadcx.w r12             ;
 0+0152 <[^>]*> 40 18 27 a5     daddx.w @r5,    r7      ;
-0+0156 <[^>]*> 00 18 f2 a0 10 00 00 00         daddx.a #16,    &0x0000 ;#0x0010
+0+0156 <[^>]*> 00 18 f2 a0 10 00 00 00         daddx.a #16,    &0x00000;0x00010
 0+015e <[^>]*> 40 18 54 a6 02 00       daddx.b 2\(r6\),        r4      ;
-0+0164 <[^>]*> 40 18 14 a0 00 00       daddx.w 0x0000, r4      ;PC rel. 0x0168
+0+0164 <[^>]*> 40 18 14 a0 00 00       daddx.w 0x00000,r4      ;PC rel. 0x00168
 0+016a <[^>]*> 40 18 90 83 00 00       decx.w  0x0000          ;PC rel. abs addr 0x016e
 0+0170 <[^>]*> 00 18 d0 83 00 00       decx.a  0x0000          ;PC rel. abs addr 0x0174
 0+0176 <[^>]*> 40 18 d0 83 00 00       decx.b  0x0000          ;PC rel. abs addr 0x017a
@@ -87,23 +87,23 @@ Disassembly of section .text:
 0+01b2 <[^>]*> 40 18 6a 53     incdx.b r10             ;
 0+01b6 <[^>]*> 40 18 2b 53     incdx.w r11             ;
 0+01ba <[^>]*> 40 18 3c e3     invx.w  r12             ;
-0+01be <[^>]*> 00 18 f0 e3 00 00       xorx.a  #-1,    0x0000  ;r3 As==11, PC rel. 0x01c2
+0+01be <[^>]*> 00 18 f0 e3 00 00       xorx.a  #-1,    0x00000 ;r3 As==11, PC rel. 0x001c2
 0+01c4 <[^>]*> 40 18 7e e3     xorx.b  #-1,    r14     ;r3 As==11
 0+01c8 <[^>]*> 40 18 3f e3     invx.w  r15             ;
 0+01cc <[^>]*> 40 18 34 40 00 00       movx.w  #0,     r4      ;
 0+01d2 <[^>]*> 00 18 75 40 00 00       movx.a  #0,     r5      ;
 0+01d8 <[^>]*> 40 18 76 40 00 00       movx.b  #0,     r6      ;
 0+01de <[^>]*> 40 18 37 40 00 00       movx.w  #0,     r7      ;
-0+01e4 <[^>]*> 40 18 15 42 00 00       movx.w  &0x0000,r5      ;0x0000
+0+01e4 <[^>]*> 40 18 15 42 00 00       movx.w  &0x00000,r5     ;
 0+01ea <[^>]*> 40 18 35 40 00 00       movx.w  #0,     r5      ;
-0+01f0 <[^>]*> 40 18 82 45 00 00       movx.w  r5,     &0x0000 ;
-0+01f6 <[^>]*> 40 1d b2 40 de bc 00 00         movx.w  #-344866,&0x0000        ;0xabcde
-0+01fe <[^>]*> 40 18 92 42 00 00 00 00         movx.w  &0x0000,&0x0000 ;0x0000
-0+0206 <[^>]*> 40 18 b2 40 00 00 00 00         movx.w  #0,     &0x0000 ;
-0+020e <[^>]*> 40 18 15 40 00 00       movx.w  0x0000, r5      ;PC rel. 0x0212
-0+0214 <[^>]*> 40 18 80 45 00 00       movx.w  r5,     0x0000  ; PC rel. 0x0218
-0+021a <[^>]*> 40 1d b0 40 de bc 00 00         movx.w  #-344866,0x0000 ;0xabcde, PC rel. 0x0220
-0+0222 <[^>]*> 40 18 90 40 00 00 00 00         movx.w  0x0000, 0x0000  ;PC rel. 0x0226, PC rel. 0x0228
+0+01f0 <[^>]*> 40 18 82 45 00 00       movx.w  r5,     &0x00000;
+0+01f6 <[^>]*> 40 1d b2 40 de bc 00 00         movx.w  #-344866,&0x00000;0xabcde
+0+01fe <[^>]*> 40 18 92 42 00 00 00 00         movx.w  &0x00000,&0x00000;
+0+0206 <[^>]*> 40 18 b2 40 00 00 00 00         movx.w  #0,     &0x00000;
+0+020e <[^>]*> 40 18 15 40 00 00       movx.w  0x00000,r5      ;PC rel. 0x00212
+0+0214 <[^>]*> 40 18 80 45 00 00       movx.w  r5,     0x00000 ; PC rel. 0x00218
+0+021a <[^>]*> 40 1d b0 40 de bc 00 00         movx.w  #-344866,0x00000        ;0xabcde, PC rel. 0x00220
+0+0222 <[^>]*> 40 18 90 40 00 00 00 00         movx.w  0x00000,0x00000 ;PC rel. 0x00226, PC rel. 0x00228
 0+022a <[^>]*> 40 18 0f 73     sbcx.w  r15             ;
 0+022e <[^>]*> 00 18 40 73     sbcx.a  r0              ;
 0+0232 <[^>]*> 40 18 4f 73     sbcx.b  r15             ;
@@ -113,22 +113,22 @@ Disassembly of section .text:
 0+0246 <[^>]*> 40 18 4f 7f     subcx.b r15,    r15     ;
 0+024a <[^>]*> 40 18 b7 75 00 00       subcx.w @r5\+,  0\(r7\) ;
 0+0250 <[^>]*> 40 18 10 86 02 00       subx.w  2\(r6\),        r0      ;
-0+0256 <[^>]*> 00 18 f0 80 67 11 00 00         subx.a  #4455,  0x0000  ;#0x1167, PC rel. 0x025c
+0+0256 <[^>]*> 00 18 f0 80 67 11 00 00         subx.a  #4455,  0x00000 ;0x01167, PC rel. 0x0025c
 0+025e <[^>]*> 40 18 50 86 02 00       subx.b  2\(r6\),        r0      ;
 0+0264 <[^>]*> 40 18 10 86 02 00       subx.w  2\(r6\),        r0      ;
-0+026a <[^>]*> 40 18 80 93 00 00       cmpx.w  #0,     0x0000  ;r3 As==00, PC rel. 0x026e
-0+0270 <[^>]*> 00 18 c0 93 00 00       cmpx.a  #0,     0x0000  ;r3 As==00, PC rel. 0x0274
-0+0276 <[^>]*> 40 18 c0 93 00 00       cmpx.b  #0,     0x0000  ;r3 As==00, PC rel. 0x027a
-0+027c <[^>]*> 40 18 80 93 00 00       cmpx.w  #0,     0x0000  ;r3 As==00, PC rel. 0x0280
-0+0282 <[^>]*> 40 18 b0 e0 5a 5a 00 00         xorx.w  #23130, 0x0000  ;#0x5a5a, PC rel. 0x0288
-0+028a <[^>]*> 40 18 90 e2 00 00 00 00         xorx.w  &0x0000,0x0000  ;0x0000, PC rel. 0x0290
-0+0292 <[^>]*> 40 18 a0 e8 00 00       xorx.w  @r8,    0x0000  ; PC rel. 0x0296
-0+0298 <[^>]*> 40 18 80 e8 00 00       xorx.w  r8,     0x0000  ; PC rel. 0x029c
-0+029e <[^>]*> 40 18 d0 e6 02 00 00 00         xorx.b  2\(r6\),        0x0000  ; PC rel. 0x02a4
-0+02a6 <[^>]*> 40 18 f0 e8 00 00       xorx.b  @r8\+,  0x0000  ; PC rel. 0x02aa
-0+02ac <[^>]*> 00 18 d2 e0 00 00 00 00         xorx.a  0x0000, &0x0000 ;PC rel. 0x02b0
+0+026a <[^>]*> 40 18 80 93 00 00       cmpx.w  #0,     0x00000 ;r3 As==00, PC rel. 0x0026e
+0+0270 <[^>]*> 00 18 c0 93 00 00       cmpx.a  #0,     0x00000 ;r3 As==00, PC rel. 0x00274
+0+0276 <[^>]*> 40 18 c0 93 00 00       cmpx.b  #0,     0x00000 ;r3 As==00, PC rel. 0x0027a
+0+027c <[^>]*> 40 18 80 93 00 00       cmpx.w  #0,     0x00000 ;r3 As==00, PC rel. 0x00280
+0+0282 <[^>]*> 40 18 b0 e0 5a 5a 00 00         xorx.w  #23130, 0x00000 ;0x05a5a, PC rel. 0x00288
+0+028a <[^>]*> 40 18 90 e2 00 00 00 00         xorx.w  &0x00000,0x00000        ; PC rel. 0x00290
+0+0292 <[^>]*> 40 18 a0 e8 00 00       xorx.w  @r8,    0x00000 ; PC rel. 0x00296
+0+0298 <[^>]*> 40 18 80 e8 00 00       xorx.w  r8,     0x00000 ; PC rel. 0x0029c
+0+029e <[^>]*> 40 18 d0 e6 02 00 00 00         xorx.b  2\(r6\),        0x00000 ; PC rel. 0x002a4
+0+02a6 <[^>]*> 40 18 f0 e8 00 00       xorx.b  @r8\+,  0x00000 ; PC rel. 0x002aa
+0+02ac <[^>]*> 00 18 d2 e0 00 00 00 00         xorx.a  0x00000,&0x00000;PC rel. 0x002b0
 0+02b4 <[^>]*> 40 18 26 e5     xorx.w  @r5,    r6      ;
-0+02b8 <[^>]*> 04 18 ff e0 39 30 78 56         xorx.a  #12345, 284280\(r15\);#0x3039, 0x45678
+0+02b8 <[^>]*> 04 18 ff e0 39 30 78 56         xorx.a  #12345, 284280\(r15\);0x03039, 0x45678
 0+02c0 <[^>]*> a7 01 45 23     adda    #74565, r7      ;0x12345
 0+02c4 <[^>]*> ee 06           adda    r6,     r14     ;
 0+02c6 <[^>]*> 80 00 00 00     mova    #0,     r0      ;
@@ -162,7 +162,7 @@ Disassembly of section .text:
 0+0320 <[^>]*> 00 13           reti                    
 0+0322 <[^>]*> f6 05           suba    r5,     r6      ;
 0+0324 <[^>]*> b6 0f ff ff     suba    #1048575,r6     ;0xfffff
-0+0328 <[^>]*> 40 18 80 93 00 00       cmpx.w  #0,     0x0000  ;r3 As==00, PC rel. 0x032c
+0+0328 <[^>]*> 40 18 80 93 00 00       cmpx.w  #0,     0x00000 ;r3 As==00, PC rel. 0x0032c
 0+032e <[^>]*> 05 17           popm    #1,     r5      ;16-bit words
 0+0330 <[^>]*> 2d 16           popm.a  #3,     r15     ;20-bit words
 0+0332 <[^>]*> 75 17           popm    #8,     r12     ;16-bit words
@@ -224,4 +224,4 @@ Disassembly of section .text:
 0+03e8 <[^>]*> c2 01           mova    r1,     r2      ;
 0+03ea <[^>]*> 10 01           reta                    ;
 0+03ec <[^>]*> f2 01           suba    r1,     r2      ;
-0+03ee <[^>]*> 40 18 80 93 00 00       cmpx.w  #0,     0x0000  ;r3 As==00, PC rel. 0x03f2
+0+03ee <[^>]*> 40 18 80 93 00 00       cmpx.w  #0,     0x00000 ;r3 As==00, PC rel. 0x003f2