config.gcc (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7 as well as arm-wrs...
authorJerome Lambourg <lambourg@adacore.com>
Tue, 1 Aug 2017 14:14:21 +0000 (14:14 +0000)
committerOlivier Hainque <hainque@gcc.gnu.org>
Tue, 1 Aug 2017 14:14:21 +0000 (14:14 +0000)
2017-08-01  Jerome Lambourg  <lambourg@adacore.com>
           Doug Rupp  <rupp@adacore.com>
           Olivier Hainque  <hainque@adacore.com>

   gcc/
    * config.gcc (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7 as
    well as arm-wrs-vxworks. Update target_cpu_name from arm6 (arch v3) to
    arm8 (arch v4).
    * config/arm/vxworks.h (MAYBE_TARGET_BPABI_CPP_BUILTINS): New, helper
    for TARGET_OS_CPP_BUILTIN.
    (TARGET_OS_CPP_BUILTIN): Invoke MAYBE_TARGET_BPABI_CPP_BUILTINS(),
    refine CPU definitions for arm_arch5 and add those for arm_arch6 and
    arm_arch7.
     (MAYBE_ASM_ABI_SPEC): New, helper for SUBTARGET_EXTRA_ASM_SPEC,
    passing required abi options to the assembler for EABI configurations.
    (EXTRA_CC1_SPEC): New macro, to help prevent the implicit production
    of .text.hot and .text.unlikely sections for kernel modules when
    using ARM style exceptions.
    (CC1_SPEC): Remove obsolete attempt at mimicking Diab toolchain
    options. Add EXTRA_CC1_SPEC.
    (VXWORKS_ENDIAN_SPEC): Adjust comment and remove handling of Diab
    toolchain options.
    (DWARF2_UNWIND_INFO): Redefine to handle the pre/post VxWorks 7
    transition.
    (ARM_TARGET2_DWARF_FORMAT): Define.
    * config/arm/t-vxworks: Adjust multilib control to removal of the
    Diab command line options.

    libgcc/
    * config.host (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7
    as well as arm-wrs-vxworks.
    * config/arm/t-vxworks7: New file.  Add unwind-arm-vxworks.c to
    LIB2ADDEH.
    * config/arm/unwind-arm-vxworks.c: New file. Provide dummy
    __exidx_start and __exidx_end for downloadable modules.

Co-Authored-By: Doug Rupp <rupp@adacore.com>
Co-Authored-By: Olivier Hainque <hainque@adacore.com>
From-SVN: r250781

gcc/ChangeLog
gcc/config.gcc
gcc/config/arm/t-vxworks
gcc/config/arm/vxworks.h
libgcc/ChangeLog
libgcc/config.host
libgcc/config/arm/t-vxworks7 [new file with mode: 0644]
libgcc/config/arm/unwind-arm-vxworks.c [new file with mode: 0644]

index 09e2831eb2e8f84fe8ee8a0160ff5699d7abaf9c..a6661bb12d9f5f9102c250f51ea3d2d5c6781264 100644 (file)
@@ -1,3 +1,30 @@
+2017-08-01  Jerome Lambourg  <lambourg@adacore.com>
+            Doug Rupp  <rupp@adacore.com>
+            Olivier Hainque  <hainque@adacore.com>
+
+       * config.gcc (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7 as
+       well as arm-wrs-vxworks. Update target_cpu_name from arm6 (arch v3) to
+       arm8 (arch v4).
+       * config/arm/vxworks.h (MAYBE_TARGET_BPABI_CPP_BUILTINS): New, helper
+       for TARGET_OS_CPP_BUILTIN.
+       (TARGET_OS_CPP_BUILTIN): Invoke MAYBE_TARGET_BPABI_CPP_BUILTINS(),
+       refine CPU definitions for arm_arch5 and add those for arm_arch6 and
+       arm_arch7.
+       (MAYBE_ASM_ABI_SPEC): New, helper for SUBTARGET_EXTRA_ASM_SPEC,
+       passing required abi options to the assembler for EABI configurations.
+       (EXTRA_CC1_SPEC): New macro, to help prevent the implicit production
+       of .text.hot and .text.unlikely sections for kernel modules when
+       using ARM style exceptions.
+       (CC1_SPEC): Remove obsolete attempt at mimicking Diab toolchain
+       options. Add EXTRA_CC1_SPEC.
+       (VXWORKS_ENDIAN_SPEC): Adjust comment and remove handling of Diab
+       toolchain options.
+       (DWARF2_UNWIND_INFO): Redefine to handle the pre/post VxWorks 7
+       transition.
+       (ARM_TARGET2_DWARF_FORMAT): Define.
+       * config/arm/t-vxworks: Adjust multilib control to removal of the
+       Diab command line options.
+
 2017-08-01  Martin Liska  <mliska@suse.cz>
 
        PR gcov-profile/81561
index fdf4cb845ae1d6b724acb8a5a455bc3742fb976e..60f3d0ba1410db92463bc9216e36fa481c06c38c 100644 (file)
@@ -1059,11 +1059,23 @@ arc*-*-linux*)
        big*)   tm_file="arc/big.h ${tm_file}"
        esac
         ;;
-arm-wrs-vxworks)
-       tm_file="elfos.h arm/elf.h arm/aout.h ${tm_file} vx-common.h vxworks.h arm/vxworks.h"
+arm-wrs-vxworks|arm-wrs-vxworks7)
        extra_options="${extra_options} arm/vxworks.opt"
        tmake_file="${tmake_file} arm/t-arm arm/t-vxworks"
-       target_cpu_cname="arm6"
+        case $target in
+       *-vxworks7)
+            # VxWorks7 on ARM adheres to the ARM Base Platform ABI
+           tmake_file="${tmake_file} arm/t-bpabi"
+           tm_file="arm/bpabi.h ${tm_file}"
+           # The BPABI long long divmod functions return a 128-bit value in
+           # registers r0-r3.
+           need_64bit_hwint=yes
+           default_use_cxa_atexit=yes
+           ;;
+        *)  ;;
+        esac
+        tm_file="elfos.h arm/elf.h arm/aout.h ${tm_file} vx-common.h vxworks.h arm/vxworks.h"
+       target_cpu_cname="arm8"
        ;;
 arm*-*-freebsd*)                # ARM FreeBSD EABI
        tm_file="dbxelf.h elfos.h ${fbsd_tm_file} arm/elf.h"
index 093d7fae88b07f94fef2164ef9a9e49c17de2823..0a3840ba8fee09b7e593cd35242f7c421e1798b6 100644 (file)
@@ -16,9 +16,7 @@
 # along with GCC; see the file COPYING3.  If not see
 # <http://www.gnu.org/licenses/>.
 
-MULTILIB_OPTIONS = \
-  mrtp fPIC \
-  t4/t4be/t4t/t4tbe/t5/t5be/t5t/t5tbe/tstrongarm/txscale/txscalebe
-MULTILIB_MATCHES = fPIC=fpic
-# Don't build -fPIC multilibs for kernel or Thumb code.
-MULTILIB_EXCEPTIONS = fPIC* mrtp/fPIC/*t[45]t*
+MULTILIB_OPTIONS = mrtp fPIC
+
+# -fPIC alone is not supported, only together with -mrtp
+MULTILIB_EXCEPTIONS = fPIC
index f20324f144d97ebe5d6b7b443bd8eda9590ca4de..59f6282a0ea78a188cf8f3914980c7b791ee4ef1 100644 (file)
@@ -26,7 +26,15 @@ a copy of the GCC Runtime Library Exception along with this program;
 see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
 <http://www.gnu.org/licenses/>.  */
 
+/* TARGET_OS_CPP_BUILTINS, down to BPABI if defined.  */
 
+#if defined (TARGET_BPABI_CPP_BUILTINS)
+#define MAYBE_TARGET_BPABI_CPP_BUILTINS TARGET_BPABI_CPP_BUILTINS
+#else
+#define MAYBE_TARGET_BPABI_CPP_BUILTINS()
+#endif
+
+#undef TARGET_OS_CPP_BUILTINS
 #define TARGET_OS_CPP_BUILTINS()               \
   do {                                         \
     if (TARGET_BIG_END)                                \
@@ -36,8 +44,29 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
                                                \
     if (arm_arch_xscale)                       \
       builtin_define ("CPU=XSCALE");           \
+    else if (arm_arch7)                                \
+      {                                                \
+       if (!arm_arch_notm)                     \
+         builtin_define ("CPU=ARMARCH7M");     \
+       else if (TARGET_THUMB)                  \
+         builtin_define ("CPU=ARMARCH7_T2");   \
+       else                                    \
+         builtin_define ("CPU=ARMARCH7");      \
+      }                                                \
+    else if (arm_arch6)                                \
+      {                                                \
+       if (TARGET_THUMB)                       \
+         builtin_define ("CPU=ARMARCH6_T");    \
+       else                                    \
+         builtin_define ("CPU=ARMARCH6");      \
+      }                                                \
     else if (arm_arch5)                                \
-      builtin_define ("CPU=ARMARCH5");         \
+      {                                                \
+       if (TARGET_THUMB)                       \
+         builtin_define ("CPU=ARMARCH5_T");    \
+       else                                    \
+         builtin_define ("CPU=ARMARCH5");      \
+      }                                                \
     else if (arm_arch4)                                \
       {                                                \
        if (TARGET_THUMB)                       \
@@ -46,6 +75,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
          builtin_define ("CPU=ARMARCH4");      \
       }                                                \
     VXWORKS_OS_CPP_BUILTINS ();                        \
+    MAYBE_TARGET_BPABI_CPP_BUILTINS ();                \
   } while (0)
 
 #undef SUBTARGET_OVERRIDE_OPTIONS
@@ -55,27 +85,32 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
 #undef SUBTARGET_CPP_SPEC
 #define SUBTARGET_CPP_SPEC "-D__ELF__" VXWORKS_ADDITIONAL_CPP_SPEC
 
+/* .text.hot and .text.unlikely sections are badly handled by the
+   VxWorks kernel mode loader for ARM style exceptions.  */
+
+#if ARM_UNWIND_INFO
+#define EXTRA_CC1_SPEC "%{!mrtp:-fno-reorder-functions}"
+#else
+#define EXTRA_CC1_SPEC
+#endif
+
 #undef  CC1_SPEC
-#define CC1_SPEC                                                       \
-"%{tstrongarm:-mlittle-endian -mcpu=strongarm ;                                \
-   t4:        -mlittle-endian -march=armv4 ;                           \
-   t4be:      -mbig-endian -march=armv4 ;                              \
-   t4t:       -mthumb -mthumb-interwork -mlittle-endian -march=armv4t ;        \
-   t4tbe:     -mthumb -mthumb-interwork -mbig-endian -march=armv4t ;   \
-   t5:        -mlittle-endian -march=armv5 ;                           \
-   t5be:      -mbig-endian -march=armv5 ;                              \
-   t5t:       -mthumb -mthumb-interwork -mlittle-endian -march=armv5 ; \
-   t5tbe:     -mthumb -mthumb-interwork -mbig-endian -march=armv5 ;    \
-   txscale:   -mlittle-endian -mcpu=xscale ;                           \
-   txscalebe: -mbig-endian -mcpu=xscale ;                              \
-            : -march=armv4}"
-
-/* Pass -EB for big-endian targets.  */
-#define VXWORKS_ENDIAN_SPEC \
-  "%{mbig-endian|t4be|t4tbe|t5be|t5tbe|txscalebe:-EB}"
+#define CC1_SPEC "" EXTRA_CC1_SPEC
+
+/* Translate an explicit -mbig-endian as an explicit -EB to assembler
+   and linker, and pass abi options matching the target expectations
+   or command-line requests.  */
+#define VXWORKS_ENDIAN_SPEC "%{mbig-endian:-EB}"
+
+#if defined (TARGET_BPABI_CPP_BUILTINS)
+#define MAYBE_ASM_ABI_SPEC \
+  "%{mabi=apcs-gnu|mabi=atpcs:-meabi=gnu;:-meabi=5}" TARGET_FIX_V4BX_SPEC
+#else
+#define MAYBE_ASM_ABI_SPEC
+#endif
 
 #undef SUBTARGET_EXTRA_ASM_SPEC
-#define SUBTARGET_EXTRA_ASM_SPEC VXWORKS_ENDIAN_SPEC
+#define SUBTARGET_EXTRA_ASM_SPEC MAYBE_ASM_ABI_SPEC " " VXWORKS_ENDIAN_SPEC
 
 #undef LINK_SPEC
 #define LINK_SPEC VXWORKS_LINK_SPEC " " VXWORKS_ENDIAN_SPEC
@@ -89,6 +124,14 @@ see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
 #undef ENDFILE_SPEC
 #define ENDFILE_SPEC VXWORKS_ENDFILE_SPEC
 
+/* For exceptions, pre VX7 uses DWARF2 info, VX7 uses ARM unwinding.  */
+#undef  DWARF2_UNWIND_INFO
+#define DWARF2_UNWIND_INFO (!TARGET_VXWORKS7)
+
+#undef ARM_TARGET2_DWARF_FORMAT
+#define ARM_TARGET2_DWARF_FORMAT \
+  (TARGET_VXWORKS_RTP ? DW_EH_PE_pcrel : DW_EH_PE_absptr)
+
 /* There is no default multilib.  */
 #undef MULTILIB_DEFAULTS
 
index 626a50f1a400e109e2e265bfe024ff6b599fdb34..14aed0b495ed2f0799db3a10dd63c8afad6a00af 100644 (file)
@@ -1,3 +1,14 @@
+2017-08-01  Jerome Lambourg  <lambourg@adacore.com>
+            Doug Rupp  <rupp@adacore.com>
+            Olivier Hainque  <hainque@adacore.com>
+
+       * config.host (arm-wrs-vxworks*): Rework to handle arm-wrs-vxworks7
+       as well as arm-wrs-vxworks.
+       * config/arm/t-vxworks7: New file.  Add unwind-arm-vxworks.c to
+       LIB2ADDEH.
+       * config/arm/unwind-arm-vxworks.c: New file. Provide dummy
+       __exidx_start and __exidx_end for downloadable modules.
+
 2017-08-01  Olivier Hainque  <hainque@adacore.com>
 
        * config/t-vxworks (LIBGCC2_INCLUDES): Start with -I. after -nostdinc.
index ae8836e88918ec63a3b3474fc2617fef56e48cfb..9556c77cddebf85a85ee06368a98148411ab5691 100644 (file)
@@ -388,9 +388,18 @@ arc*-*-linux*)
        extra_parts="$extra_parts crti.o crtn.o"
        extra_parts="$extra_parts crttls.o"
        ;;
-arm-wrs-vxworks)
+arm-wrs-vxworks|arm-wrs-vxworks7)
        tmake_file="$tmake_file arm/t-arm arm/t-elf t-softfp-sfdf t-softfp-excl arm/t-softfp t-softfp"
        extra_parts="$extra_parts crti.o crtn.o"
+       case ${host} in
+       *-*-vxworks7)
+         # Note that arm/t-bpabi will reset the LIB2ADDEH macro.
+         # This is intentional.
+         tmake_file="$tmake_file arm/t-bpabi arm/t-vxworks7"
+         tm_file="$tm_file arm/bpabi-lib.h"
+         unwind_header=config/arm/unwind-arm.h
+         ;;
+       esac
        ;;
 arm*-*-freebsd*)                # ARM FreeBSD EABI
        tmake_file="${tmake_file} arm/t-arm t-fixedpoint-gnu-prefix arm/t-elf"
diff --git a/libgcc/config/arm/t-vxworks7 b/libgcc/config/arm/t-vxworks7
new file mode 100644 (file)
index 0000000..bead336
--- /dev/null
@@ -0,0 +1 @@
+LIB2ADDEH += $(srcdir)/config/arm/unwind-arm-vxworks.c
diff --git a/libgcc/config/arm/unwind-arm-vxworks.c b/libgcc/config/arm/unwind-arm-vxworks.c
new file mode 100644 (file)
index 0000000..ed23ab9
--- /dev/null
@@ -0,0 +1,33 @@
+/* Support for ARM EABI unwinding in VxWorks Downloadable Kernel Modules.
+   Copyright (C) 2017 Free Software Foundation, Inc.
+
+   This file is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by the
+   Free Software Foundation; either version 3, or (at your option) any
+   later version.
+
+   This file is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#if defined(__vxworks) && !defined (__RTP__)
+/* Vxworks for ARM uses __gnu_Unwind_Find_exidx to retrieve the exception
+   table for downloadable kernel modules.  As those modules are only partially
+   linked, the linker won't generate __exidx_start|end, but the two symbols
+   are still used in alternate paths from unwind-arm-common.inc.
+
+   As we don't rely on them, but still need the symbols, we define dummy
+   values here.  */
+void *__exidx_start __attribute__((__visibility__ ("hidden")));
+void *__exidx_end __attribute__((__visibility__ ("hidden")));
+#endif