c4x.h (IS_INT_CALL_SAVED_REG, [...]): Define.

	* c4x.h (IS_INT_CALL_SAVED_REG, IS_FLOAT_CALL_SAVED_REG): Define.
	(HARD_REGNO_CALL_PART_CLOBBERED): Use IS_FLOAT_CALL_SAVED_REG.
	(INITIAL_FRAME_POINTER_OFFSET, INITIAL_ELIMINATION_OFFSET): Likewise.
	* c4x.c (c4x_hard_regno_rename_ok): Use IS_XXX_CALL_SAVED_REG.
	(c4x_expand_prologue, c4x_expand_epilogue): Likewise.

From-SVN: r39421

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d4226ee8cfbf382b187f099eebddee0b81d5bbfc..f5ed372c71c8f2b08c860dd01c07fb6d87c3bc06 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2001-02-03  Michael Hayes  <m.hayes@elec.canterbury.ac.nz)
+
+       * c4x.h (IS_INT_CALL_SAVED_REG, IS_FLOAT_CALL_SAVED_REG): Define.
+       (HARD_REGNO_CALL_PART_CLOBBERED): Use IS_FLOAT_CALL_SAVED_REG.
+       (INITIAL_FRAME_POINTER_OFFSET, INITIAL_ELIMINATION_OFFSET): Likewise.
+       * c4x.c (c4x_hard_regno_rename_ok): Use IS_XXX_CALL_SAVED_REG.
+       (c4x_expand_prologue, c4x_expand_epilogue): Likewise.
+
 2001-02-03  Herman A.J. ten Brugge <Haj.Ten.Brugge@net.HCC.nl>
 
        * c4x.c (group1_reg_operand, group1_mem_operand, arx_reg_operand,

diff --git a/gcc/config/c4x/c4x.c b/gcc/config/c4x/c4x.c
index fd084b1b7bdbca4d0f3757fedebd9a20cb7bb056..1f65ba60467b312a6ee314fcc84ff8a0c495cfdc 100644 (file)
--- a/gcc/config/c4x/c4x.c
+++ b/gcc/config/c4x/c4x.c
@@ -437,11 +437,9 @@ c4x_hard_regno_rename_ok (regno1, regno2)
 {
   /* We can not copy call saved registers from mode QI into QF or from
      mode QF into QI.  */
-  if ((regno1 == R6_REGNO || regno1 == R7_REGNO)
-      && (regno2 == R4_REGNO || regno2 == R5_REGNO || regno2 == R8_REGNO))
+  if (IS_FLOAT_CALL_SAVED_REGNO (regno1) && IS_INT_CALL_SAVED_REGNO (regno2))
     return 0;
-  if ((regno1 == R4_REGNO || regno1 == R5_REGNO || regno1 == R8_REGNO)
-      && (regno2 == R6_REGNO || regno2 == R7_REGNO))
+  if (IS_INT_CALL_SAVED_REGNO (regno1) && IS_FLOAT_CALL_SAVED_REGNO (regno2))
     return 0;
   /* We cannot copy from an extended (40 bit) register to a standard
      (32 bit) register because we only set the condition codes for
@@ -987,9 +985,8 @@ c4x_expand_prologue ()
        {
          if (regs_ever_live[regno] && ! call_used_regs[regno])
            {
-             if ((regno == R6_REGNO) || (regno == R7_REGNO))
+             if (IS_FLOAT_CALL_SAVED_REGNO (regno))
                {
-                 /* R6 and R7 are saved as floating point.  */
                  if (TARGET_PRESERVE_FLOAT)
                    {
                       insn = emit_insn (gen_pushqi
@@ -1119,8 +1116,7 @@ c4x_expand_epilogue()
              if (regno == AR3_REGNO && dont_pop_ar3)
                continue;
              
-             /* R6 and R7 are saved as floating point.  */
-             if ((regno == R6_REGNO) || (regno == R7_REGNO))
+             if (IS_FLOAT_CALL_SAVED_REGNO (regno))
                {
                  insn = emit_insn (gen_popqf_unspec
                                    (gen_rtx_REG (QFmode, regno)));

diff --git a/gcc/config/c4x/c4x.h b/gcc/config/c4x/c4x.h
index a64c0380cd8d4528dc68068775dc72c1cf4418e6..e5cba8f0d2f5e3a596a2e0a6fb784d5e967dd777 100644 (file)
--- a/gcc/config/c4x/c4x.h
+++ b/gcc/config/c4x/c4x.h
@@ -492,6 +492,9 @@ extern const char *c4x_rpts_cycles_string, *c4x_cpu_version_string;
                                   || IS_BK_REGNO(r))
 #define IS_INT_REGNO(r)           (IS_EXT_REGNO(r) || IS_STD_REGNO(r))
 #define IS_GROUP1_REGNO(r)        (IS_ADDR_OR_INDEX_REGNO(r) || IS_BK_REGNO(r))
+#define IS_INT_CALL_SAVED_REGNO(r) (((r) == R4_REGNO) || ((r) == R5_REGNO) \
+                                    || ((r) == R8_REGNO))
+#define IS_FLOAT_CALL_SAVED_REGNO(r) (((r) == R6_REGNO) || ((r) == R7_REGNO))
 
 #define IS_PSEUDO_REGNO(r)            ((r) >= FIRST_PSEUDO_REGISTER)
 #define IS_R0R1_OR_PSEUDO_REGNO(r)    (IS_R0R1_REGNO(r) || IS_PSEUDO_REGNO(r))
@@ -639,8 +642,8 @@ extern const char *c4x_rpts_cycles_string, *c4x_cpu_version_string;
    registers.  */
 
 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE)                          \
-     ((((REGNO) == R6_REGNO || (REGNO) == R7_REGNO) && ! ((MODE) == QFmode))  \
-      || (((REGNO) == R4_REGNO || (REGNO) == R5_REGNO || (REGNO == R8_REGNO)) \
+     ((IS_FLOAT_CALL_SAVED_REGNO (REGNO) && ! ((MODE) == QFmode))            \
+      || (IS_INT_CALL_SAVED_REGNO (REGNO))                                   \
          && ! ((MODE) == QImode || (MODE) == HImode || (MODE) == Pmode)))
 
 /* Specify the modes required to caller save a given hard regno.  */
@@ -1057,8 +1060,7 @@ enum reg_class
   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)      \
     if (regs_ever_live[regno] && ! call_used_regs[regno])      \
       offset += TARGET_PRESERVE_FLOAT                          \
-               && ((regno == R6_REGNO) || (regno == R7_REGNO)) \
-               ? 2 : 1;                                        \
+               && IS_FLOAT_CALL_SAVED_REGNO (regno) ? 2 : 1;   \
   (DEPTH) = -(offset + get_frame_size ());                     \
 }
 
@@ -1077,8 +1079,7 @@ enum reg_class
   for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)      \
     if (regs_ever_live[regno] && ! call_used_regs[regno])      \
       offset += TARGET_PRESERVE_FLOAT                          \
-               && ((regno == R6_REGNO) || (regno == R7_REGNO)) \
-               ? 2 : 1;                                        \
+               && IS_FLOAT_CALL_SAVED_REGNO (regno) ? 2 : 1;   \
   (OFFSET) = -(offset + get_frame_size ());                    \
 }