radv/ac: frag shader only needs ring offsets if sample positions enabled

mostly documenting things, since with modern llvm we always have the
spill enabled.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index b3e522dd7326b8e70a3a425050717c0402926162..1ca27d5e701c21830416b9b7551da1362f2dda48 100644 (file)
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -572,10 +572,13 @@ static void create_function(struct nir_to_llvm_context *ctx)
            ctx->stage == MESA_SHADER_VERTEX ||
            ctx->stage == MESA_SHADER_TESS_CTRL ||
            ctx->stage == MESA_SHADER_TESS_EVAL ||
-           ctx->stage == MESA_SHADER_FRAGMENT ||
            ctx->is_gs_copy_shader)
                need_ring_offsets = true;
 
+       if (ctx->stage == MESA_SHADER_FRAGMENT &&
+           ctx->shader_info->info.ps.needs_sample_positions)
+               need_ring_offsets = true;
+
        if (need_ring_offsets && !ctx->options->supports_spill) {
                arg_types[arg_idx++] = const_array(ctx->v16i8, 16); /* address of rings */
        }