opcodes: blackfin: fix decoding of vector shift insn w/saturation

The saturation bit was missed when decoding a vector shift insn
leading to the output looking the same as the non-saturating insn.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 5ffc5c9f48a1add7541dfe4afb2cbd79a2dccb70..3067e3cce7d43797dc569a2c1d44edf0ba5f55ea 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2010-09-22  Robin Getz  <robin.getz@analog.com>
+
+       * bfin-dis.c (decode_dsp32shiftimm_0): Add missing "S" flag.
+
 2010-09-22  Mike Frysinger  <vapier@gentoo.org>
 
        * bfin-dis.c (decode_CC2stat_0): Decode all ASTAT bits.

diff --git a/opcodes/bfin-dis.c b/opcodes/bfin-dis.c
index f124f1403f597b5aa920c170ae076e47f584be2a..a510db1e764b0c19bbdce2e919eb6f0f86e36a2d 100644 (file)
--- a/opcodes/bfin-dis.c
+++ b/opcodes/bfin-dis.c
@@ -4461,7 +4461,7 @@ decode_dsp32shiftimm_0 (TIword iw0, TIword iw1, disassemble_info *outf)
       OUTS (outf, dregs (src1));
       OUTS (outf, " >>> ");
       OUTS (outf, imm5 (-immag));
-      OUTS (outf, " (V)");
+      OUTS (outf, " (V, S)");
     }
   else if (sop == 2 && sopcde == 1 && bit8 == 1)
     {