projects
/
openpower-isa.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
e56e124
)
state.py: Fix expected dump for cr regs
author
klehman
<klehman9@comcast.net>
Thu, 28 Oct 2021 02:53:08 +0000
(22:53 -0400)
committer
klehman
<klehman9@comcast.net>
Thu, 28 Oct 2021 02:53:08 +0000
(22:53 -0400)
src/openpower/test/state.py
patch
|
blob
|
history
diff --git
a/src/openpower/test/state.py
b/src/openpower/test/state.py
index d932ed38af06d4621b741975120ef4f4395c26aa..735d19253d9461fe41b915d5c33162c9552418be 100644
(file)
--- a/
src/openpower/test/state.py
+++ b/
src/openpower/test/state.py
@@
-236,10
+236,11
@@
class ExpectedState(State):
msg = "%se.intregs[%d] = 0x%x\n"
sout.write( msg % (lindent, i, reg))
# cr
- for i, reg in enumerate(state.crregs):
- if(reg != 0):
+ for i in range(8):
+ cri = state.crregs[7 - i]
+ if(cri != 0):
msg = "%se.crregs[%d] = 0x%x\n"
- sout.write( msg % (lindent, i,
reg
))
+ sout.write( msg % (lindent, i,
cri
))
# XER
if(state.so != 0):
sout.write("%se.so = 0x%x\n" % (lindent, state.so))