re PR rtl-optimization/68536 (LRA ICEs with new arm pattern)

2015-11-27  Vladimir Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/68536
	* lra.c (lra_emit_add): Add code for null base.
	* lra-constraints.c (curr_insn_transform): Skip operators for
	subreg reloads.

From-SVN: r231021

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fb519990fa9b884541b18f82f48aae227d20862c..b30e9a10a5c13cd26481524c266888cc8d5055ed 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2015-11-27  Vladimir Makarov  <vmakarov@redhat.com>
+
+       PR rtl-optimization/68536
+       * lra.c (lra_emit_add): Add code for null base.
+       * lra-constraints.c (curr_insn_transform): Skip operators for
+       subreg reloads.
+
 2015-11-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
        Revert

diff --git a/gcc/lra-constraints.c b/gcc/lra-constraints.c
index f2d5b40b5febfca88238b1c01c057075013cbac4..a78edd8d344cf2485f3e8bde16999e3f1dc737e4 100644 (file)
--- a/gcc/lra-constraints.c
+++ b/gcc/lra-constraints.c
@@ -3383,10 +3383,13 @@ curr_insn_transform (bool check_only_p)
        depend on memory mode.  */
     for (i = 0; i < n_operands; i++)
       {
-       rtx op = *curr_id->operand_loc[i];
-       rtx subst, old = op;
+       rtx op, subst, old;
        bool op_change_p = false;
+
+       if (curr_static_id->operand[i].is_operator)
+         continue;
        
+       old = op = *curr_id->operand_loc[i];
        if (GET_CODE (old) == SUBREG)
          old = SUBREG_REG (old);
        subst = get_equiv_with_elimination (old, curr_insn);

diff --git a/gcc/lra.c b/gcc/lra.c
index 0995c54aee446a49adbd67db1ec4c4beabb6788b..ff040bb5295222c2ff32910f5d975d8e27a96658 100644 (file)
--- a/gcc/lra.c
+++ b/gcc/lra.c
@@ -382,7 +382,7 @@ lra_emit_add (rtx x, rtx y, rtx z)
          base = a1;
          index = a2;
        }
-      if (! (REG_P (base) || GET_CODE (base) == SUBREG)
+      if ((base != NULL_RTX && ! (REG_P (base) || GET_CODE (base) == SUBREG))
          || (index != NULL_RTX
              && ! (REG_P (index) || GET_CODE (index) == SUBREG))
          || (disp != NULL_RTX && ! CONSTANT_P (disp))
@@ -442,18 +442,28 @@ lra_emit_add (rtx x, rtx y, rtx z)
                  rtx_insn *insn = emit_add2_insn (x, disp);
                  if (insn != NULL_RTX)
                    {
-                     insn = emit_add2_insn (x, base);
-                     if (insn != NULL_RTX)
+                     if (base == NULL_RTX)
                        ok_p = true;
+                     else
+                       {
+                         insn = emit_add2_insn (x, base);
+                         if (insn != NULL_RTX)
+                           ok_p = true;
+                       }
                    }
                }
              if (! ok_p)
                {
+                 rtx_insn *insn;
+                 
                  delete_insns_since (last);
                  /* Generate x = disp; x = x + base; x = x + index_scale.  */
                  emit_move_insn (x, disp);
-                 rtx_insn *insn = emit_add2_insn (x, base);
-                 lra_assert (insn != NULL_RTX);
+                 if (base != NULL_RTX)
+                   {
+                     insn = emit_add2_insn (x, base);
+                     lra_assert (insn != NULL_RTX);
+                   }
                  insn = emit_add2_insn (x, index_scale);
                  lra_assert (insn != NULL_RTX);
                }