depth = image->extent.depth;
}
- const struct isl_extent3d lod_align_sa =
- isl_surf_get_lod_alignment_sa(&surface->isl);
+ const struct isl_extent3d image_align_sa =
+ isl_surf_get_image_alignment_sa(&surface->isl);
struct GENX(RENDER_SURFACE_STATE) surface_state = {
.SurfaceType = image->surface_type,
.SurfaceArray = image->array_size > 1,
.SurfaceFormat = format->surface_format,
- .SurfaceVerticalAlignment = anv_valign[lod_align_sa.height],
- .SurfaceHorizontalAlignment = anv_halign[lod_align_sa.width],
+ .SurfaceVerticalAlignment = anv_valign[image_align_sa.height],
+ .SurfaceHorizontalAlignment = anv_halign[image_align_sa.width],
/* From bspec (DevSNB, DevIVB): "Set Tile Walk to TILEWALK_XMAJOR if
* Tiled Surface is False."
* format (ETC2 has a block height of 4), then the vertical alignment is
* 4 compression blocks or, equivalently, 16 pixels.
*/
- struct isl_extent3d lod_align_el = isl_surf_get_lod_alignment_el(surf);
- *halign = anv_halign[lod_align_el.width];
- *valign = anv_valign[lod_align_el.height];
+ struct isl_extent3d image_align_el
+ = isl_surf_get_image_alignment_el(surf);
+
+ *halign = anv_halign[image_align_el.width];
+ *valign = anv_valign[image_align_el.height];
#else
/* Pre-Skylake, RENDER_SUFFACE_STATE.SurfaceVerticalAlignment is in
* units of surface samples. For example, if SurfaceVerticalAlignment
* format (compressed or not) the vertical alignment is
* 4 pixels.
*/
- struct isl_extent3d lod_align_sa = isl_surf_get_lod_alignment_sa(surf);
- *halign = anv_halign[lod_align_sa.width];
- *valign = anv_valign[lod_align_sa.height];
+ struct isl_extent3d image_align_sa
+ = isl_surf_get_image_alignment_sa(surf);
+
+ *halign = anv_halign[image_align_sa.width];
+ *valign = anv_valign[image_align_sa.height];
#endif
}
}
static void
-isl_choose_lod_alignment_el(const struct isl_device *dev,
- const struct isl_surf_init_info *restrict info,
- enum isl_tiling tiling,
- enum isl_msaa_layout msaa_layout,
- struct isl_extent3d *lod_align_el)
+isl_choose_image_alignment_el(const struct isl_device *dev,
+ const struct isl_surf_init_info *restrict info,
+ enum isl_tiling tiling,
+ enum isl_msaa_layout msaa_layout,
+ struct isl_extent3d *image_align_el)
{
if (ISL_DEV_GEN(dev) >= 9) {
- gen9_choose_lod_alignment_el(dev, info, tiling, msaa_layout,
- lod_align_el);
+ gen9_choose_image_alignment_el(dev, info, tiling, msaa_layout,
+ image_align_el);
} else if (ISL_DEV_GEN(dev) >= 8) {
- gen8_choose_lod_alignment_el(dev, info, tiling, msaa_layout,
- lod_align_el);
+ gen8_choose_image_alignment_el(dev, info, tiling, msaa_layout,
+ image_align_el);
} else if (ISL_DEV_GEN(dev) >= 7) {
- gen7_choose_lod_alignment_el(dev, info, tiling, msaa_layout,
- lod_align_el);
+ gen7_choose_image_alignment_el(dev, info, tiling, msaa_layout,
+ image_align_el);
} else if (ISL_DEV_GEN(dev) >= 6) {
- gen6_choose_lod_alignment_el(dev, info, tiling, msaa_layout,
- lod_align_el);
+ gen6_choose_image_alignment_el(dev, info, tiling, msaa_layout,
+ image_align_el);
} else {
- gen4_choose_lod_alignment_el(dev, info, tiling, msaa_layout,
- lod_align_el);
+ gen4_choose_image_alignment_el(dev, info, tiling, msaa_layout,
+ image_align_el);
}
}
const struct isl_device *dev,
const struct isl_surf_init_info *restrict info,
enum isl_msaa_layout msaa_layout,
- const struct isl_extent3d *lod_align_sa,
+ const struct isl_extent3d *image_align_sa,
const struct isl_extent4d *phys_level0_sa,
struct isl_extent2d *phys_slice0_sa)
{
isl_msaa_interleaved_scale_px_to_sa(info->samples, &W, &H);
}
- uint32_t w = isl_align_npot(W, lod_align_sa->w);
- uint32_t h = isl_align_npot(H, lod_align_sa->h);
+ uint32_t w = isl_align_npot(W, image_align_sa->w);
+ uint32_t h = isl_align_npot(H, image_align_sa->h);
if (l == 0) {
slice_top_w = w;
isl_calc_phys_slice0_extent_sa_gen4_3d(
const struct isl_device *dev,
const struct isl_surf_init_info *restrict info,
- const struct isl_extent3d *lod_align_sa,
+ const struct isl_extent3d *image_align_sa,
const struct isl_extent4d *phys_level0_sa,
struct isl_extent2d *phys_slice0_sa)
{
uint32_t D0 = phys_level0_sa->d;
for (uint32_t l = 0; l < info->levels; ++l) {
- uint32_t level_w = isl_align_npot(isl_minify(W0, l), lod_align_sa->w);
- uint32_t level_h = isl_align_npot(isl_minify(H0, l), lod_align_sa->h);
- uint32_t level_d = isl_align_npot(isl_minify(D0, l), lod_align_sa->d);
+ uint32_t level_w = isl_align_npot(isl_minify(W0, l), image_align_sa->w);
+ uint32_t level_h = isl_align_npot(isl_minify(H0, l), image_align_sa->h);
+ uint32_t level_d = isl_align_npot(isl_minify(D0, l), image_align_sa->d);
uint32_t max_layers_horiz = MIN(level_d, 1u << l);
uint32_t max_layers_vert = isl_align(level_d, 1u << l) / (1u << l);
/**
* Calculate the physical extent of the surface's first array slice, in units
- * of surface samples. The result is aligned to \a lod_align_sa.
+ * of surface samples. The result is aligned to \a image_align_sa.
*/
static void
isl_calc_phys_slice0_extent_sa(const struct isl_device *dev,
const struct isl_surf_init_info *restrict info,
enum isl_dim_layout dim_layout,
enum isl_msaa_layout msaa_layout,
- const struct isl_extent3d *lod_align_sa,
+ const struct isl_extent3d *image_align_sa,
const struct isl_extent4d *phys_level0_sa,
struct isl_extent2d *phys_slice0_sa)
{
/*fallthrough*/
case ISL_DIM_LAYOUT_GEN4_2D:
isl_calc_phys_slice0_extent_sa_gen4_2d(dev, info, msaa_layout,
- lod_align_sa, phys_level0_sa,
+ image_align_sa, phys_level0_sa,
phys_slice0_sa);
return;
case ISL_DIM_LAYOUT_GEN4_3D:
- isl_calc_phys_slice0_extent_sa_gen4_3d(dev, info, lod_align_sa,
+ isl_calc_phys_slice0_extent_sa_gen4_3d(dev, info, image_align_sa,
phys_level0_sa, phys_slice0_sa);
return;
}
/**
* Calculate the pitch between physical array slices, in units of rows of
- * surface samples. The result is aligned to \a lod_align_sa.
+ * surface samples. The result is aligned to \a image_align_sa.
*/
static uint32_t
isl_calc_array_pitch_sa_rows(const struct isl_device *dev,
const struct isl_surf_init_info *restrict info,
enum isl_dim_layout dim_layout,
enum isl_array_pitch_span array_pitch_span,
- const struct isl_extent3d *lod_align_sa,
+ const struct isl_extent3d *image_align_sa,
const struct isl_extent4d *phys_level0_sa,
const struct isl_extent2d *phys_slice0_sa)
{
case ISL_DIM_LAYOUT_GEN4_2D:
switch (array_pitch_span) {
case ISL_ARRAY_PITCH_SPAN_COMPACT:
- return isl_align_npot(phys_slice0_sa->h, lod_align_sa->h);
+ return isl_align_npot(phys_slice0_sa->h, image_align_sa->h);
case ISL_ARRAY_PITCH_SPAN_FULL: {
/* The QPitch equation is found in the Broadwell PRM >> Volume 5:
* Memory Views >> Common Surface Formats >> Surface Layout >> 2D
uint32_t H0_sa = phys_level0_sa->h;
uint32_t H1_sa = isl_minify(H0_sa, 1);
- uint32_t h0_sa = isl_align_npot(H0_sa, lod_align_sa->h);
- uint32_t h1_sa = isl_align_npot(H1_sa, lod_align_sa->h);
+ uint32_t h0_sa = isl_align_npot(H0_sa, image_align_sa->h);
+ uint32_t h1_sa = isl_align_npot(H1_sa, image_align_sa->h);
uint32_t m;
if (ISL_DEV_GEN(dev) >= 7) {
m = 11;
}
- uint32_t pitch_sa_rows = h0_sa + h1_sa + (m * lod_align_sa->h);
+ uint32_t pitch_sa_rows = h0_sa + h1_sa + (m * image_align_sa->h);
if (ISL_DEV_GEN(dev) == 6 && info->samples > 1 &&
(info->height % 4 == 1)) {
case ISL_DIM_LAYOUT_GEN4_3D:
assert(array_pitch_span == ISL_ARRAY_PITCH_SPAN_COMPACT);
- return isl_align_npot(phys_slice0_sa->h, lod_align_sa->h);
+ return isl_align_npot(phys_slice0_sa->h, image_align_sa->h);
}
unreachable("bad isl_dim_layout");
isl_calc_row_pitch(const struct isl_device *dev,
const struct isl_surf_init_info *restrict info,
const struct isl_tile_info *tile_info,
- const struct isl_extent3d *lod_align_sa,
+ const struct isl_extent3d *image_align_sa,
const struct isl_extent2d *phys_slice0_sa)
{
const struct isl_format_layout *fmtl = isl_format_get_layout(info->format);
if (!isl_choose_msaa_layout(dev, info, tiling, &msaa_layout))
return false;
- struct isl_extent3d lod_align_el;
- isl_choose_lod_alignment_el(dev, info, tiling, msaa_layout, &lod_align_el);
+ struct isl_extent3d image_align_el;
+ isl_choose_image_alignment_el(dev, info, tiling, msaa_layout,
+ &image_align_el);
- struct isl_extent3d lod_align_sa =
- isl_extent3d_el_to_sa(info->format, lod_align_el);
+ struct isl_extent3d image_align_sa =
+ isl_extent3d_el_to_sa(info->format, image_align_el);
struct isl_extent4d phys_level0_sa;
isl_calc_phys_level0_extent_sa(dev, info, dim_layout, tiling, msaa_layout,
struct isl_extent2d phys_slice0_sa;
isl_calc_phys_slice0_extent_sa(dev, info, dim_layout, msaa_layout,
- &lod_align_sa, &phys_level0_sa,
+ &image_align_sa, &phys_level0_sa,
&phys_slice0_sa);
assert(phys_slice0_sa.w % fmtl->bw == 0);
assert(phys_slice0_sa.h % fmtl->bh == 0);
const uint32_t row_pitch = isl_calc_row_pitch(dev, info, &tile_info,
- &lod_align_sa,
+ &image_align_sa,
&phys_slice0_sa);
const uint32_t array_pitch_sa_rows =
isl_calc_array_pitch_sa_rows(dev, info, dim_layout, array_pitch_span,
- &lod_align_sa, &phys_level0_sa,
+ &image_align_sa, &phys_level0_sa,
&phys_slice0_sa);
assert(array_pitch_sa_rows % fmtl->bh == 0);
.levels = info->levels,
.samples = info->samples,
- .lod_alignment_el = lod_align_el,
+ .image_alignment_el = image_align_el,
.logical_level0_px = logical_level0_px,
.phys_level0_sa = phys_level0_sa,
enum isl_format format;
/**
- * Alignment of the upper-left sample of each LOD, in units of surface
+ * Alignment of the upper-left sample of each subimage, in units of surface
* elements.
*/
- struct isl_extent3d lod_alignment_el;
+ struct isl_extent3d image_alignment_el;
/**
* Logical extent of the surface's base level, in units of pixels. This is
const struct isl_surf_init_info *restrict info);
/**
- * Alignment of the upper-left sample of each LOD, in units of surface
+ * Alignment of the upper-left sample of each subimage, in units of surface
* elements.
*/
static inline struct isl_extent3d
-isl_surf_get_lod_alignment_el(const struct isl_surf *surf)
+isl_surf_get_image_alignment_el(const struct isl_surf *surf)
{
- return surf->lod_alignment_el;
+ return surf->image_alignment_el;
}
/**
- * Alignment of the upper-left sample of each LOD, in units of surface
+ * Alignment of the upper-left sample of each subimage, in units of surface
* samples.
*/
static inline struct isl_extent3d
-isl_surf_get_lod_alignment_sa(const struct isl_surf *surf)
+isl_surf_get_image_alignment_sa(const struct isl_surf *surf)
{
const struct isl_format_layout *fmtl = isl_format_get_layout(surf->format);
return (struct isl_extent3d) {
- .w = fmtl->bw * surf->lod_alignment_el.w,
- .h = fmtl->bh * surf->lod_alignment_el.h,
- .d = fmtl->bd * surf->lod_alignment_el.d,
+ .w = fmtl->bw * surf->image_alignment_el.w,
+ .h = fmtl->bh * surf->image_alignment_el.h,
+ .d = fmtl->bd * surf->image_alignment_el.d,
};
}
}
void
-gen4_choose_lod_alignment_el(const struct isl_device *dev,
- const struct isl_surf_init_info *restrict info,
- enum isl_tiling tiling,
- enum isl_msaa_layout msaa_layout,
- struct isl_extent3d *lod_align_el)
+gen4_choose_image_alignment_el(const struct isl_device *dev,
+ const struct isl_surf_init_info *restrict info,
+ enum isl_tiling tiling,
+ enum isl_msaa_layout msaa_layout,
+ struct isl_extent3d *image_align_el)
{
assert(info->samples == 1);
assert(msaa_layout == ISL_MSAA_LAYOUT_NONE);
*/
if (isl_format_is_compressed(info->format)) {
- *lod_align_el = isl_extent3d(1, 1, 1);
+ *image_align_el = isl_extent3d(1, 1, 1);
return;
}
- *lod_align_el = isl_extent3d(4, 2, 1);
+ *image_align_el = isl_extent3d(4, 2, 1);
}
enum isl_msaa_layout *msaa_layout);
void
-gen4_choose_lod_alignment_el(const struct isl_device *dev,
- const struct isl_surf_init_info *restrict info,
- enum isl_tiling tiling,
- enum isl_msaa_layout msaa_layout,
- struct isl_extent3d *lod_align_el);
+gen4_choose_image_alignment_el(const struct isl_device *dev,
+ const struct isl_surf_init_info *restrict info,
+ enum isl_tiling tiling,
+ enum isl_msaa_layout msaa_layout,
+ struct isl_extent3d *image_align_el);
#ifdef __cplusplus
}
}
void
-gen6_choose_lod_alignment_el(const struct isl_device *dev,
- const struct isl_surf_init_info *restrict info,
- enum isl_tiling tiling,
- enum isl_msaa_layout msaa_layout,
- struct isl_extent3d *lod_align_el)
+gen6_choose_image_alignment_el(const struct isl_device *dev,
+ const struct isl_surf_init_info *restrict info,
+ enum isl_tiling tiling,
+ enum isl_msaa_layout msaa_layout,
+ struct isl_extent3d *image_align_el)
{
/* Note that the surface's horizontal image alignment is not programmable
* on Sandybridge.
*/
if (isl_format_is_compressed(info->format)) {
- *lod_align_el = isl_extent3d(1, 1, 1);
+ *image_align_el = isl_extent3d(1, 1, 1);
return;
}
if (isl_format_is_yuv(info->format)) {
- *lod_align_el = isl_extent3d(4, 2, 1);
+ *image_align_el = isl_extent3d(4, 2, 1);
return;
}
if (info->samples > 1) {
- *lod_align_el = isl_extent3d(4, 4, 1);
+ *image_align_el = isl_extent3d(4, 4, 1);
return;
}
if (isl_surf_usage_is_depth_or_stencil(info->usage) &&
!ISL_DEV_USE_SEPARATE_STENCIL(dev)) {
/* interleaved depthstencil buffer */
- *lod_align_el = isl_extent3d(4, 4, 1);
+ *image_align_el = isl_extent3d(4, 4, 1);
return;
}
if (isl_surf_usage_is_depth(info->usage)) {
/* separate depth buffer */
- *lod_align_el = isl_extent3d(4, 4, 1);
+ *image_align_el = isl_extent3d(4, 4, 1);
return;
}
if (isl_surf_usage_is_stencil(info->usage)) {
/* separate stencil buffer */
- *lod_align_el = isl_extent3d(4, 2, 1);
+ *image_align_el = isl_extent3d(4, 2, 1);
return;
}
- *lod_align_el = isl_extent3d(4, 2, 1);
+ *image_align_el = isl_extent3d(4, 2, 1);
}
enum isl_msaa_layout *msaa_layout);
void
-gen6_choose_lod_alignment_el(const struct isl_device *dev,
- const struct isl_surf_init_info *restrict info,
- enum isl_tiling tiling,
- enum isl_msaa_layout msaa_layout,
- struct isl_extent3d *lod_align_el);
+gen6_choose_image_alignment_el(const struct isl_device *dev,
+ const struct isl_surf_init_info *restrict info,
+ enum isl_tiling tiling,
+ enum isl_msaa_layout msaa_layout,
+ struct isl_extent3d *image_align_el);
#ifdef __cplusplus
}
}
/**
- * Choose horizontal LOD alignment, in units of surface elements.
+ * Choose horizontal subimage alignment, in units of surface elements.
*/
static uint32_t
gen7_choose_halign_el(const struct isl_device *dev,
}
/**
- * Choose vertical LOD alignment, in units of surface elements.
+ * Choose vertical subimage alignment, in units of surface elements.
*/
static uint32_t
gen7_choose_valign_el(const struct isl_device *dev,
}
void
-gen7_choose_lod_alignment_el(const struct isl_device *dev,
- const struct isl_surf_init_info *restrict info,
- enum isl_tiling tiling,
- enum isl_msaa_layout msaa_layout,
- struct isl_extent3d *lod_align_el)
+gen7_choose_image_alignment_el(const struct isl_device *dev,
+ const struct isl_surf_init_info *restrict info,
+ enum isl_tiling tiling,
+ enum isl_msaa_layout msaa_layout,
+ struct isl_extent3d *image_align_el)
{
/* IVB+ does not support combined depthstencil. */
assert(!isl_surf_usage_is_depth_and_stencil(info->usage));
- *lod_align_el = (struct isl_extent3d) {
+ *image_align_el = (struct isl_extent3d) {
.w = gen7_choose_halign_el(dev, info),
.h = gen7_choose_valign_el(dev, info, tiling),
.d = 1,
enum isl_msaa_layout *msaa_layout);
void
-gen7_choose_lod_alignment_el(const struct isl_device *dev,
- const struct isl_surf_init_info *restrict info,
- enum isl_tiling tiling,
- enum isl_msaa_layout msaa_layout,
- struct isl_extent3d *lod_align_el);
+gen7_choose_image_alignment_el(const struct isl_device *dev,
+ const struct isl_surf_init_info *restrict info,
+ enum isl_tiling tiling,
+ enum isl_msaa_layout msaa_layout,
+ struct isl_extent3d *image_align_el);
#ifdef __cplusplus
}
}
/**
- * Choose horizontal LOD alignment, in units of surface elements.
+ * Choose horizontal subimage alignment, in units of surface elements.
*/
static uint32_t
gen8_choose_halign_el(const struct isl_device *dev,
}
/**
- * Choose vertical LOD alignment, in units of surface elements.
+ * Choose vertical subimage alignment, in units of surface elements.
*/
static uint32_t
gen8_choose_valign_el(const struct isl_device *dev,
}
void
-gen8_choose_lod_alignment_el(const struct isl_device *dev,
- const struct isl_surf_init_info *restrict info,
- enum isl_tiling tiling,
- enum isl_msaa_layout msaa_layout,
- struct isl_extent3d *lod_align_el)
+gen8_choose_image_alignment_el(const struct isl_device *dev,
+ const struct isl_surf_init_info *restrict info,
+ enum isl_tiling tiling,
+ enum isl_msaa_layout msaa_layout,
+ struct isl_extent3d *image_align_el)
{
assert(!isl_tiling_is_std_y(tiling));
* row.)
*/
- *lod_align_el = (struct isl_extent3d) {
+ *image_align_el = (struct isl_extent3d) {
.w = gen8_choose_halign_el(dev, info),
.h = gen8_choose_valign_el(dev, info),
.d = 1,
enum isl_msaa_layout *msaa_layout);
void
-gen8_choose_lod_alignment_el(const struct isl_device *dev,
- const struct isl_surf_init_info *restrict info,
- enum isl_tiling tiling,
- enum isl_msaa_layout msaa_layout,
- struct isl_extent3d *lod_align_el);
+gen8_choose_image_alignment_el(const struct isl_device *dev,
+ const struct isl_surf_init_info *restrict info,
+ enum isl_tiling tiling,
+ enum isl_msaa_layout msaa_layout,
+ struct isl_extent3d *image_align_el);
#ifdef __cplusplus
}
#include "isl_priv.h"
/**
- * Calculate the LOD alignment, in units of surface samples, for the standard
- * tiling formats Yf and Ys.
+ * Calculate the surface's subimage alignment, in units of surface samples,
+ * for the standard tiling formats Yf and Ys.
*/
static void
-gen9_calc_std_lod_alignment_sa(const struct isl_device *dev,
- const struct isl_surf_init_info *restrict info,
- enum isl_tiling tiling,
- enum isl_msaa_layout msaa_layout,
- struct isl_extent3d *align_sa)
+gen9_calc_std_image_alignment_sa(const struct isl_device *dev,
+ const struct isl_surf_init_info *restrict info,
+ enum isl_tiling tiling,
+ enum isl_msaa_layout msaa_layout,
+ struct isl_extent3d *align_sa)
{
const struct isl_format_layout *fmtl = isl_format_get_layout(info->format);
}
void
-gen9_choose_lod_alignment_el(const struct isl_device *dev,
- const struct isl_surf_init_info *restrict info,
- enum isl_tiling tiling,
- enum isl_msaa_layout msaa_layout,
- struct isl_extent3d *lod_align_el)
+gen9_choose_image_alignment_el(const struct isl_device *dev,
+ const struct isl_surf_init_info *restrict info,
+ enum isl_tiling tiling,
+ enum isl_msaa_layout msaa_layout,
+ struct isl_extent3d *image_align_el)
{
/* This BSpec text provides some insight into the hardware's alignment
* requirements [Skylake BSpec > Memory Views > Common Surface Formats >
*/
if (isl_tiling_is_std_y(tiling)) {
- struct isl_extent3d lod_align_sa;
- gen9_calc_std_lod_alignment_sa(dev, info, tiling, msaa_layout,
- &lod_align_sa);
+ struct isl_extent3d image_align_sa;
+ gen9_calc_std_image_alignment_sa(dev, info, tiling, msaa_layout,
+ &image_align_sa);
- *lod_align_el = isl_extent3d_sa_to_el(info->format, lod_align_sa);
+ *image_align_el = isl_extent3d_sa_to_el(info->format, image_align_sa);
return;
}
/* See the Skylake BSpec > Memory Views > Common Surface Formats > Surface
* Layout and Tiling > 1D Surfaces > 1D Alignment Requirements.
*/
- *lod_align_el = isl_extent3d(64, 1, 1);
+ *image_align_el = isl_extent3d(64, 1, 1);
return;
}
* To avoid wasting memory, choose the smallest alignment possible:
* HALIGN_4 and VALIGN_4.
*/
- *lod_align_el = isl_extent3d(4, 4, 1);
+ *image_align_el = isl_extent3d(4, 4, 1);
return;
}
- gen8_choose_lod_alignment_el(dev, info, tiling, msaa_layout, lod_align_el);
+ gen8_choose_image_alignment_el(dev, info, tiling, msaa_layout,
+ image_align_el);
}
#endif
void
-gen9_choose_lod_alignment_el(const struct isl_device *dev,
- const struct isl_surf_init_info *restrict info,
- enum isl_tiling tiling,
- enum isl_msaa_layout msaa_layout,
- struct isl_extent3d *lod_align_el);
+gen9_choose_image_alignment_el(const struct isl_device *dev,
+ const struct isl_surf_init_info *restrict info,
+ enum isl_tiling tiling,
+ enum isl_msaa_layout msaa_layout,
+ struct isl_extent3d *image_align_el);
#ifdef __cplusplus
}