m1crg: set CLKIN_PERIOD for vga_clock_gen

diff --git a/verilog/m1crg/m1crg.v b/verilog/m1crg/m1crg.v
index 23ccf0bce89c82fc95e9205d3e39ed2f7ebe1b2d..d5582d405129e2a2e593504a7c291cd69301b90e 100644 (file)
--- a/verilog/m1crg/m1crg.v
+++ b/verilog/m1crg/m1crg.v
@@ -263,7 +263,7 @@ DCM_CLKGEN #(
        .CLKFX_DIVIDE(4),
        .CLKFX_MD_MAX(2.0),
        .CLKFX_MULTIPLY(2),
-       .CLKIN_PERIOD(0.0),
+       .CLKIN_PERIOD(20.0),
        .SPREAD_SPECTRUM("NONE"),
        .STARTUP_WAIT("FALSE")
 ) vga_clock_gen (