More progress... run a few instructions now, but die on the second

memory access (I think because we're deallocating our one and only
CpuRequest object).

base/loader/aout_object.cc:
base/loader/ecoff_object.cc:
base/loader/elf_object.cc:
    Add flag to force allocation of new pages on data writes.
cpu/simple/cpu.cc:
    Several minor fixes.
    Switch to atomic mode for now.
mem/physical.hh:
    Don't copy the packet to the response event, just keep a reference
    to the original.
mem/translating_port.cc:
mem/translating_port.hh:
    Add parameter to writeBlobFunctional() to force allocation of
    unallocated pages on writes.

--HG--
extra : convert_revision : 05cb31c7b0047b492dcfa0d12ddee690ef762b44

diff --git a/base/loader/aout_object.cc b/base/loader/aout_object.cc
index 54bf81aafa6a6a037b0c75877b1e332d823e39aa..d1b27120d76005fd591caacf11dd509cb76d9e5b 100644 (file)
--- a/base/loader/aout_object.cc
+++ b/base/loader/aout_object.cc
@@ -91,9 +91,11 @@ AoutObject::loadSections(TranslatingPort *memPort, bool loadPhys)
     // Since we don't really have an MMU and all memory is
     // zero-filled, there's no need to set up the BSS segment.
     if (text.size != 0)
-        memPort->writeBlobFunctional(textAddr, fileData + N_TXTOFF(*execHdr), text.size);
+        memPort->writeBlobFunctional(textAddr, fileData + N_TXTOFF(*execHdr),
+                                     text.size, true);
     if (data.size != 0)
-        memPort->writeBlobFunctional(dataAddr, fileData + N_DATOFF(*execHdr), data.size);
+        memPort->writeBlobFunctional(dataAddr, fileData + N_DATOFF(*execHdr),
+                                     data.size, true);
 
     return true;
 }

diff --git a/base/loader/ecoff_object.cc b/base/loader/ecoff_object.cc
index a18ecc026cfaff070b3f53b8b641a3be1d57d9e7..a4b8c871352d4376640bc4542a7ea68accbcc7d7 100644 (file)
--- a/base/loader/ecoff_object.cc
+++ b/base/loader/ecoff_object.cc
@@ -94,8 +94,10 @@ EcoffObject::loadSections(TranslatingPort *memPort, bool loadPhys)
 
     // Since we don't really have an MMU and all memory is
     // zero-filled, there's no need to set up the BSS segment.
-    memPort->writeBlobFunctional(textAddr, fileData + ECOFF_TXTOFF(execHdr), text.size);
-    memPort->writeBlobFunctional(dataAddr, fileData + ECOFF_DATOFF(execHdr), data.size);
+    memPort->writeBlobFunctional(textAddr, fileData + ECOFF_TXTOFF(execHdr),
+                                 text.size, true);
+    memPort->writeBlobFunctional(dataAddr, fileData + ECOFF_DATOFF(execHdr),
+                                 data.size, true);
 
     return true;
 }

diff --git a/base/loader/elf_object.cc b/base/loader/elf_object.cc
index aeb81cb768eb5eb15838030ce808deb428fef605..11c94d651698fbb861a331d27676512457f4c261 100644 (file)
--- a/base/loader/elf_object.cc
+++ b/base/loader/elf_object.cc
@@ -183,9 +183,9 @@ ElfObject::loadSections(TranslatingPort *memPort, bool loadPhys)
     // Since we don't really have an MMU and all memory is
     // zero-filled, there's no need to set up the BSS segment.
     if (text.size != 0)
-        memPort->writeBlobFunctional(textAddr, fileTextBits, text.size);
+        memPort->writeBlobFunctional(textAddr, fileTextBits, text.size, true);
     if (data.size != 0)
-        memPort->writeBlobFunctional(dataAddr, fileDataBits, data.size);
+        memPort->writeBlobFunctional(dataAddr, fileDataBits, data.size, true);
 
     return true;
 }

diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc
index 7da000a35d7ac389f25c6b5d004c715c3d7473e3..41acd2456960ea281733d11766c7a7027cb0345b 100644 (file)
--- a/cpu/simple/cpu.cc
+++ b/cpu/simple/cpu.cc
@@ -659,7 +659,7 @@ SimpleCPU::dbg_vtophys(Addr addr)
 void
 SimpleCPU::sendIcacheRequest()
 {
-#if 1
+#if 0
     bool success = icachePort.sendTiming(*pkt);
 
     unscheduleTickEvent();
@@ -674,7 +674,7 @@ SimpleCPU::sendIcacheRequest()
         _status = IcacheWaitResponse;
     }
 #else
-    Tick latency = icachePort.sendAtomic(pkt);
+    Tick latency = icachePort.sendAtomic(*pkt);
 
     unscheduleTickEvent();
     scheduleTickEvent(latency);
@@ -695,7 +695,7 @@ SimpleCPU::sendDcacheRequest()
 {
     unscheduleTickEvent();
 
-#if 1
+#if 0
     bool success = dcachePort.sendTiming(*pkt);
 
     lastDcacheStall = curTick;
@@ -706,7 +706,7 @@ SimpleCPU::sendDcacheRequest()
         _status = DcacheWaitResponse;
     }
 #else
-    Tick latency = dcachePort.sendAtomic(pkt);
+    Tick latency = dcachePort.sendAtomic(*pkt);
 
     scheduleTickEvent(latency);
 
@@ -891,7 +891,7 @@ SimpleCPU::tick()
 /*     memReq->reset(xc->regs.pc & ~3, sizeof(uint32_t),
                      IFETCH_FLAGS(xc->regs.pc));
 */
-//NEED NEW TRANSLATION HERE
+
         fault = xc->translateInstReq(req);
 
         if (fault == No_Fault) {
@@ -900,8 +900,10 @@ SimpleCPU::tick()
             pkt->addr = req->paddr;
             pkt->size = sizeof(MachInst);
             pkt->req = req;
+            pkt->data = (uint8_t *)&inst;
 
             sendIcacheRequest();
+            return;
 /*         fault = xc->mem->read(memReq, inst);
 
         if (icacheInterface && fault == No_Fault) {

diff --git a/mem/physical.hh b/mem/physical.hh
index 90515d7d1c90fbc2f3eae458124088c825f58136..854886a2786b0c76b0c2480c63d548d5a3973997 100644 (file)
--- a/mem/physical.hh
+++ b/mem/physical.hh
@@ -80,7 +80,7 @@ class PhysicalMemory : public Memory
 
     struct MemResponseEvent : public Event
     {
-        Packet pkt;
+        Packet &pkt;
         MemoryPort *memoryPort;
 
         MemResponseEvent(Packet &pkt, MemoryPort *memoryPort);

diff --git a/mem/translating_port.cc b/mem/translating_port.cc
index 052d350b99249e96ba3d246780ae9e73741513fe..e385a74b6702d595362fba3ddd65f6390c948fb4 100644 (file)
--- a/mem/translating_port.cc
+++ b/mem/translating_port.cc
@@ -47,29 +47,37 @@ TranslatingPort::readBlobFunctional(Addr addr, uint8_t *p, int size)
 
     for (ChunkGenerator gen(addr, size, VMPageSize); !gen.done(); gen.next()) {
 
-       if (!pTable->translate(gen.addr(),paddr))
-           return Machine_Check_Fault;
+        if (!pTable->translate(gen.addr(),paddr))
+            return Machine_Check_Fault;
 
-       port->readBlobFunctional(paddr, p + prevSize, gen.size());
-       prevSize += gen.size();
+        port->readBlobFunctional(paddr, p + prevSize, gen.size());
+        prevSize += gen.size();
     }
 
     return No_Fault;
 }
 
 Fault
-TranslatingPort::writeBlobFunctional(Addr addr, uint8_t *p, int size)
+TranslatingPort::writeBlobFunctional(Addr addr, uint8_t *p, int size,
+                                     bool alloc)
 {
     Addr paddr;
     int prevSize = 0;
 
     for (ChunkGenerator gen(addr, size, VMPageSize); !gen.done(); gen.next()) {
 
-       if (!pTable->translate(gen.addr(),paddr))
-           return Machine_Check_Fault;
-
-       port->writeBlobFunctional(paddr, p + prevSize, gen.size());
-       prevSize += gen.size();
+        if (!pTable->translate(gen.addr(), paddr)) {
+            if (alloc) {
+                pTable->allocate(roundDown(gen.addr(), VMPageSize),
+                                 VMPageSize);
+                pTable->translate(gen.addr(), paddr);
+            } else {
+                return Machine_Check_Fault;
+            }
+        }
+
+        port->writeBlobFunctional(paddr, p + prevSize, gen.size());
+        prevSize += gen.size();
     }
 
     return No_Fault;

diff --git a/mem/translating_port.hh b/mem/translating_port.hh
index 671c322370fdb08c6114e0f3df1433ab28f3b467..3d77b2c2b47beb3b0cf2d323a1eb1eeaeaf00d0d 100644 (file)
--- a/mem/translating_port.hh
+++ b/mem/translating_port.hh
@@ -49,7 +49,8 @@ class TranslatingPort
 
   public:
     Fault readBlobFunctional(Addr addr, uint8_t *p, int size);
-    Fault writeBlobFunctional(Addr addr, uint8_t *p, int size);
+    Fault writeBlobFunctional(Addr addr, uint8_t *p, int size,
+                              bool alloc = false);
     //   Fault memsetBlobFunctional(Addr addr, uint8_t val, int size);
     Fault writeStringFunctional(Addr addr, const char *str);
     Fault readStringFunctional(std::string &str, Addr addr);