ARM: Exclusive accesses must be double word aligned
authorAli Saidi <Ali.Saidi@arm.com>
Mon, 23 Aug 2010 16:18:40 +0000 (11:18 -0500)
committerAli Saidi <Ali.Saidi@arm.com>
Mon, 23 Aug 2010 16:18:40 +0000 (11:18 -0500)
src/arch/arm/isa/insts/ldr.isa
src/arch/arm/isa/insts/str.isa

index cc6b6351bbff8f471d5e5266892c36a917450b54..6919bbca4deb15da1d554b75f3ddaaf303f4e3d9 100644 (file)
@@ -206,7 +206,9 @@ let {{
             # Add memory request flags where necessary
             if self.flavor == "exclusive":
                 self.memFlags.append("Request::LLSC")
-            self.memFlags.append("ArmISA::TLB::AlignWord")
+                self.memFlags.append("ArmISA::TLB::AlignDoubleWord")
+            else:
+                self.memFlags.append("ArmISA::TLB::AlignWord")
 
             # Disambiguate the class name for different flavors of loads
             if self.flavor != "normal":
index 589758529dfee9323154c92a7ff17c31a64c9f8f..5b0e5b13231c56533db6a6a9a7bb27c47e19b2ee 100644 (file)
@@ -225,9 +225,11 @@ let {{
             self.Name = self.nameFunc(self.post, self.add, self.writeback)
 
             # Add memory request flags where necessary
-            self.memFlags.append("ArmISA::TLB::AlignWord")
             if self.flavor == "exclusive":
                 self.memFlags.append("Request::LLSC")
+                self.memFlags.append("ArmISA::TLB::AlignDoubleWord")
+            else:
+                self.memFlags.append("ArmISA::TLB::AlignWord")
 
             # Disambiguate the class name for different flavors of stores
             if self.flavor != "normal":