Add MOVT testing for ARMv8-M Baseline

2017-05-22  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/testsuite/
    * gcc.target/arm/movsi_movt.c: New test.
    * gcc.target/arm/movdi_movt.c: New test.

From-SVN: r248326

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b23bdeb81b3c7705a36b216d281a487150635eb0..c19e4713c0c4e33314f76f709757fce4a1083e65 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2017-05-22  Thomas Preud'homme  <thomas.preudhomme@arm.com>
+
+       * gcc.target/arm/movsi_movt.c: New test.
+       * gcc.target/arm/movdi_movt.c: New test.
+
 2017-05-22  Pierre-Marie de Rodat  <derodat@adacore.com>
 
        * gnat.dg/specs/not_null1.ads: New test.

diff --git a/gcc/testsuite/gcc.target/arm/movdi_movt.c b/gcc/testsuite/gcc.target/arm/movdi_movt.c
new file mode 100644 (file)
index 0000000..e2a28cc
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/movdi_movt.c
@@ -0,0 +1,18 @@
+/* { dg-do compile { target { arm_cortex_m && { arm_thumb2_ok || arm_thumb1_movt_ok } } } } */
+/* { dg-options "-O2 -mslow-flash-data" } */
+
+unsigned long long
+movdi_1 (int a)
+{
+  return 0xF0F00000LLU;
+}
+
+unsigned long long
+movdi_2 (int a)
+{
+  return 0xF0F0000000000000LLU;
+}
+
+/* Accept r1 because big endian targets put the low bits in the highest
+   numbered register of a pair.  */
+/* { dg-final { scan-assembler-times "movt\tr\[01\], 61680" 2 } } */

diff --git a/gcc/testsuite/gcc.target/arm/movsi_movt.c b/gcc/testsuite/gcc.target/arm/movsi_movt.c
new file mode 100644 (file)
index 0000000..3cf46e2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/movsi_movt.c
@@ -0,0 +1,10 @@
+/* { dg-do compile { target { arm_cortex_m && { arm_thumb2_ok || arm_thumb1_movt_ok } } } } */
+/* { dg-options "-O2 -mslow-flash-data" } */
+
+unsigned
+movsi (void)
+{
+  return 0xF0F00000U;
+}
+
+/* { dg-final { scan-assembler-times "movt\tr0, 61680" 1 } } */