freedreno/a4xx: move where SP_FS_MRT_REGn is emitted

Addition of color fmt bitfield to this register (compared to a3xx) means
we need to re-emit if either prog or framebuffer state is dirty.

Signed-off-by: Rob Clark <robclark@freedesktop.org>

diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index 1a0986a1925aff965a9075bd506eab32f7e5bca6..3259c210d7a3722515fe76cf1919b64458cc71c1 100644 (file)
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -412,6 +412,28 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
        if (dirty & FD_DIRTY_PROG)
                fd4_program_emit(ring, emit);
 
+       if (dirty & (FD_DIRTY_PROG | FD_DIRTY_FRAMEBUFFER)) {
+               struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
+               uint32_t color_regid = ir3_find_output_regid(fp,
+                               ir3_semantic_name(TGSI_SEMANTIC_COLOR, 0));
+               enum a4xx_color_fmt format = 0;
+
+               if (pfb->cbufs[0])
+                       format = fd4_pipe2color(pfb->cbufs[0]->format);
+
+               OUT_PKT0(ring, REG_A4XX_SP_FS_MRT_REG(0), 8);
+               OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(color_regid) |
+                               A4XX_SP_FS_MRT_REG_MRTFORMAT(format) |
+                               COND(fp->key.half_precision, A4XX_SP_FS_MRT_REG_HALF_PRECISION));
+               OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
+               OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
+               OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
+               OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
+               OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
+               OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
+               OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
+       }
+
        if ((dirty & (FD_DIRTY_PROG | FD_DIRTY_CONSTBUF)) &&
                        /* evil hack to deal sanely with clear path: */
                        (emit->prog == &ctx->prog)) {

diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_program.c b/src/gallium/drivers/freedreno/a4xx/fd4_program.c
index 591a1d870122574ecd03984083a6f5ee8323d0ce..66c118fb0991d58d98787c5fa27f0455b4455509 100644 (file)
--- a/src/gallium/drivers/freedreno/a4xx/fd4_program.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_program.c
@@ -383,20 +383,6 @@ fd4_program_emit(struct fd_ringbuffer *ring, struct fd4_emit *emit)
                OUT_RING(ring, 0x00000001);
        }
 
-       OUT_PKT0(ring, REG_A4XX_SP_FS_MRT_REG(0), 8);
-       OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(color_regid) |
-// XXX do we need to patch? or update when RT format changes..  maybe
-// move this to emit??
-                       A4XX_SP_FS_MRT_REG_MRTFORMAT(RB4_R8G8B8A8_UNORM) |  // XXX patch?
-                       COND(s[FS].v->key.half_precision, A4XX_SP_FS_MRT_REG_HALF_PRECISION));
-       OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-       OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-       OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-       OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-       OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-       OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-       OUT_RING(ring, A4XX_SP_FS_MRT_REG_REGID(0));
-
        if (emit->key.binning_pass) {
                OUT_PKT0(ring, REG_A4XX_VPC_ATTR, 2);
                OUT_RING(ring, A4XX_VPC_ATTR_THRDASSIGN(1) |