Added support for $bu0 to verilog backend
authorClifford Wolf <clifford@clifford.at>
Sat, 19 Jul 2014 23:56:16 +0000 (01:56 +0200)
committerClifford Wolf <clifford@clifford.at>
Sat, 19 Jul 2014 23:56:16 +0000 (01:56 +0200)
backends/verilog/verilog_backend.cc

index d7fe4c4e210085675703b64e1a0b4b6df25b9a43..6be26329a4fa2263008a8019907a5a615b9bddd3 100644 (file)
@@ -581,6 +581,22 @@ bool dump_cell_expr(FILE *f, std::string indent, RTLIL::Cell *cell)
                return true;
        }
 
+       if (cell->type == "$bu0")
+       {
+               fprintf(f, "%s" "assign ", indent.c_str());
+               dump_sigspec(f, cell->connections["\\Y"]);
+               if (cell->parameters["\\A_SIGNED"].as_bool()) {
+                       fprintf(f, " = $signed(");
+                       dump_sigspec(f, cell->connections["\\A"]);
+                       fprintf(f, ");\n");
+               } else {
+                       fprintf(f, " = { 1'b0, ");
+                       dump_sigspec(f, cell->connections["\\A"]);
+                       fprintf(f, " };\n");
+               }
+               return true;
+       }
+
        if (cell->type == "$concat")
        {
                fprintf(f, "%s" "assign ", indent.c_str());