stats: updates for pc-switcheroo-full due to o3 smt fix
authorAndreas Hansson <andreas.hansson@arm.com>
Tue, 22 Apr 2014 07:12:15 +0000 (03:12 -0400)
committerAndreas Hansson <andreas.hansson@arm.com>
Tue, 22 Apr 2014 07:12:15 +0000 (03:12 -0400)
tests/long/fs/10.linux-boot/ref/x86/linux/pc-switcheroo-full/stats.txt

index a3c063e756174917e84961629842e82c80e56b86..4c7c80e7e8a5a5c65d85e8809eebf6daf4b94109 100644 (file)
@@ -4,11 +4,11 @@ sim_seconds                                  5.139775                       # Nu
 sim_ticks                                5139775442500                       # Number of ticks simulated
 final_tick                               5139775442500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 241106                       # Simulator instruction rate (inst/s)
-host_op_rate                                   479260                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                             5080243819                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 990760                       # Number of bytes of host memory used
-host_seconds                                  1011.72                       # Real time elapsed on the host
+host_inst_rate                                 235748                       # Simulator instruction rate (inst/s)
+host_op_rate                                   468611                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                             4967362364                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 954112                       # Number of bytes of host memory used
+host_seconds                                  1034.71                       # Real time elapsed on the host
 sim_insts                                   243931071                       # Number of instructions simulated
 sim_ops                                     484875903                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts
@@ -1595,8 +1595,8 @@ system.cpu2.iew.iewIQFullEvents                633068                       # Nu
 system.cpu2.iew.iewLSQFullEvents                 3849                       # Number of times the LSQ has become full, causing a stall
 system.cpu2.iew.memOrderViolationEvents          4440                       # Number of memory order violations
 system.cpu2.iew.predictedTakenIncorrect        176570                       # Number of branches that were predicted taken incorrectly
-system.cpu2.iew.predictedNotTakenIncorrect       182318                       # Number of branches that were predicted not taken incorrectly
-system.cpu2.iew.branchMispredicts              358888                       # Number of branch mispredicts detected at execute
+system.cpu2.iew.predictedNotTakenIncorrect       182317                       # Number of branches that were predicted not taken incorrectly
+system.cpu2.iew.branchMispredicts              358887                       # Number of branch mispredicts detected at execute
 system.cpu2.iew.iewExecutedInsts            273973436                       # Number of executed instructions
 system.cpu2.iew.iewExecLoadInsts              6342946                       # Number of load instructions executed
 system.cpu2.iew.iewExecSquashedInsts           503814                       # Number of squashed instructions skipped in execute