* tic6x-opcode-table.h: Fix encoding of BNOP instruction.
* gas/tic6x/insns-c674x-pcrel.s: Add test of BNOP instruction
within header based fetch packet.
* gas/tic6x/insns-c674x-pcrel.d: Update expected disassembly.
+2013-01-28 Alexis Deruelle <alexis.deruelle@gmail.com>
+
+ PR gas/15069
+ * gas/tic6x/insns-c674x-pcrel.s: Add test of BNOP instruction
+ within header based fetch packet.
+ * gas/tic6x/insns-c674x-pcrel.d: Update expected disassembly.
+
2013-01-24 Nick Clifton <nickc@redhat.com>
* gas/elf/warn-2.s: Skip for all V850 variants.
0+2a8 <[^>]*> 10000012[ \t]+callp \.S2 000002a0 <f11\+0x20>,b3
[ \t]*2a8: R_C6000_PCR_S21[ \t]+b1
[ \t]*\.\.\.
+0+2c0 <[^>]*> 3014a120[ \t]+\[!b0\] bnop \.S1 00000310 <g12\+0x50>,5
+0+2c4 <[^>]*> 2010a120[ \t]+\[b0\] bnop \.S1 00000300 <g12\+0x40>,5
+0+2c8 <[^>]*> 00000410[ \t]+b \.S1 000002e0 <g12\+0x20>
+[ \t]*\.\.\.
+0+2f8 <[^>]*> 80801021[ \t]+\[a1\] bdec \.S1 000002e0 <g12\+0x20>,a1
+[ \t]*\.\.\.
+0+320 <[^>]*> 3014a120[ \t]+\[!b0\] bnop \.S1 00000348 <g13\+0x28>,5
+0+324 <[^>]*> 2010a120[ \t]+\[b0\] bnop \.S1 00000340 <g13\+0x20>,5
+0+328 <[^>]*> 00000410[ \t]+b \.S1 00000340 <g13\+0x20>
+[ \t]*\.\.\.
+0+33c <[^>]*> e0000000[ \t]+<fetch packet header 0xe0000000>
+[ \t]*\.\.\.
+0+358 <[^>]*> 80801021[ \t]+\[a1\] bdec \.S1 00000340 <g13\+0x20>,a1
+0+35c <[^>]*> e0000000[ \t]+<fetch packet header 0xe0000000>
nop
nop
nop
+g12:
+ .word 0x3014a120
+ .word 0x2010a120
+ .word 0x00000410
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ .word 0x80801021
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+g13:
+ .word 0x3014a120
+ .word 0x2010a120
+ .word 0x00000410
+ nop
+ nop
+ nop
+ nop
+ .word 0xe0000000
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ .word 0x80801021
+ .word 0xe0000000
+2013-01-28 Alexis Deruelle <alexis.deruelle@gmail.com>
+
+ PR gas/15069
+ * tic6x-opcode-table.h: Fix encoding of BNOP instruction.
+
2013-01-24 Nick Clifton <nickc@redhat.com>
* v850.h: Add e3v5 support.
TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MCNOP,
FIX0(),
OP2(OLCST, OACST),
- ENC3(ENC(s, fu, 0), ENC(src2, pcrel, 0), ENC(src1, ucst, 1)))
+ ENC3(ENC(s, fu, 0), ENC(src2, pcrel_half, 0), ENC(src1, ucst, 1)))
INSN(bnop, nfu, s_branch_nop_cst, branch, C64XP,
TIC6X_FLAG_NO_CROSS|TIC6X_FLAG_MACRO|TIC6X_FLAG_MCNOP,
FIX1(FIX(s, 0)),