+2005-02-15 Jan Beulich <jbeulich@novell.com>
+
+ * elfxx-ia64.c (ia64_howto_table): Correct strings for
+ R_IA64_DTPMOD64[LM]SB.
+
2005-02-14 H.J. Lu <hongjiu.lu@intel.com>
* elfxx-ia64.c (elfNN_ia64_relax_section): Allow relax
IA64_HOWTO (R_IA64_TPREL64LSB, "TPREL64LSB", 4, FALSE, FALSE),
IA64_HOWTO (R_IA64_LTOFF_TPREL22, "LTOFF_TPREL22", 0, FALSE, FALSE),
- IA64_HOWTO (R_IA64_DTPMOD64MSB, "TPREL64MSB", 4, FALSE, FALSE),
- IA64_HOWTO (R_IA64_DTPMOD64LSB, "TPREL64LSB", 4, FALSE, FALSE),
+ IA64_HOWTO (R_IA64_DTPMOD64MSB, "DTPMOD64MSB", 4, FALSE, FALSE),
+ IA64_HOWTO (R_IA64_DTPMOD64LSB, "DTPMOD64LSB", 4, FALSE, FALSE),
IA64_HOWTO (R_IA64_LTOFF_DTPMOD22, "LTOFF_DTPMOD22", 0, FALSE, FALSE),
IA64_HOWTO (R_IA64_DTPREL14, "DTPREL14", 0, FALSE, FALSE),
+2005-02-15 Jan Beulich <jbeulich@novell.com>
+
+ * config/tc-ia64.c (ia64_gen_real_reloc_type): Define and initialize
+ new variables type, suffix, and width. Handle
+ BFD_RELOC_IA64_DIR(32|64)[LM]SB in FUNC_LT_FPTR_RELATIVE case.
+ Handle BFD_RELOC_IA64_DIR64[LM]SB in FUNC_TP_RELATIVE case. Add
+ FUNC_DTP_MODULE case. Handle BFD_RELOC_IA64_DIR32[LM]SB in
+ FUNC_DTP_RELATIVE case. Return incoming relocation type if
+ BFD_RELOC_IA64_IPLT[LM]SB in FUNC_IPLT_RELOC case. Generate warning
+ if unable to translate relocation type, using the new variables.
+
2005-02-15 Jan Beulich <jbeulich@novell.com>
* config/tc-ia64.h (ia64_symbol_chars): Declare.
bfd_reloc_code_real_type r_type;
{
bfd_reloc_code_real_type new = 0;
+ const char *type = NULL, *suffix = "";
if (sym == NULL)
{
case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
- default: break;
+ default: type = "FPTR"; break;
}
break;
case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
- default: break;
+ default: type = "GPREL"; break;
}
break;
{
case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
- default: break;
+ default: type = "LTOFF"; break;
}
break;
switch (r_type)
{
case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
- default: break;
+ default: type = "LTOFF"; suffix = "X"; break;
}
break;
case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
- default: break;
+ default: type = "PCREL"; break;
}
break;
case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
- default: break;
+ default: type = "PLTOFF"; break;
}
break;
case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
- default: break;
+ default: type = "SECREL"; break;
}
break;
case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
- default: break;
+ default: type = "SEGREL"; break;
}
break;
case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
- default: break;
+ default: type = "LTV"; break;
}
break;
new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
case BFD_RELOC_IA64_IMM64:
new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
+ case BFD_RELOC_IA64_DIR32MSB:
+ new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break;
+ case BFD_RELOC_IA64_DIR32LSB:
+ new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break;
+ case BFD_RELOC_IA64_DIR64MSB:
+ new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break;
+ case BFD_RELOC_IA64_DIR64LSB:
+ new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break;
default:
- break;
+ type = "LTOFF_FPTR"; break;
}
break;
case FUNC_TP_RELATIVE:
switch (r_type)
{
- case BFD_RELOC_IA64_IMM14:
- new = BFD_RELOC_IA64_TPREL14; break;
- case BFD_RELOC_IA64_IMM22:
- new = BFD_RELOC_IA64_TPREL22; break;
- case BFD_RELOC_IA64_IMM64:
- new = BFD_RELOC_IA64_TPREL64I; break;
- default:
- break;
+ case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break;
+ case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break;
+ case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break;
+ case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break;
+ case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break;
+ default: type = "TPREL"; break;
}
break;
case BFD_RELOC_IA64_IMM22:
new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
default:
- break;
+ type = "LTOFF_TPREL"; break;
+ }
+ break;
+
+ case FUNC_DTP_MODULE:
+ switch (r_type)
+ {
+ case BFD_RELOC_IA64_DIR64MSB:
+ new = BFD_RELOC_IA64_DTPMOD64MSB; break;
+ case BFD_RELOC_IA64_DIR64LSB:
+ new = BFD_RELOC_IA64_DTPMOD64LSB; break;
+ default:
+ type = "DTPMOD"; break;
}
break;
case BFD_RELOC_IA64_IMM22:
new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
default:
- break;
+ type = "LTOFF_DTPMOD"; break;
}
break;
case FUNC_DTP_RELATIVE:
switch (r_type)
{
+ case BFD_RELOC_IA64_DIR32MSB:
+ new = BFD_RELOC_IA64_DTPREL32MSB; break;
+ case BFD_RELOC_IA64_DIR32LSB:
+ new = BFD_RELOC_IA64_DTPREL32LSB; break;
case BFD_RELOC_IA64_DIR64MSB:
new = BFD_RELOC_IA64_DTPREL64MSB; break;
case BFD_RELOC_IA64_DIR64LSB:
case BFD_RELOC_IA64_IMM64:
new = BFD_RELOC_IA64_DTPREL64I; break;
default:
- break;
+ type = "DTPREL"; break;
}
break;
case BFD_RELOC_IA64_IMM22:
new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
default:
- break;
+ type = "LTOFF_DTPREL"; break;
}
break;
case FUNC_IPLT_RELOC:
+ switch (r_type)
+ {
+ case BFD_RELOC_IA64_IPLTMSB: return r_type;
+ case BFD_RELOC_IA64_IPLTLSB: return r_type;
+ default: type = "IPLT"; break;
+ }
break;
default:
abort ();
}
- /* Hmmmm. Should this ever occur? */
if (new)
return new;
else
- return r_type;
+ {
+ int width;
+
+ if (!type)
+ abort ();
+ switch (r_type)
+ {
+ case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break;
+ case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break;
+ case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break;
+ case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break;
+ case BFD_RELOC_IA64_IMM14: width = 14; break;
+ case BFD_RELOC_IA64_IMM22: width = 22; break;
+ case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break;
+ default: abort ();
+ }
+
+ /* This should be an error, but since previously there wasn't any
+ diagnostic here, dont't make it fail because of this for now. */
+ as_warn ("Cannot express %s%d%s relocation", type, width, suffix);
+ return r_type;
+ }
}
/* Here is where generate the appropriate reloc for pseudo relocation
+2005-02-15 Jan Beulich <jbeulich@novell.com>
+
+ * gas/ia64/reloc.[ds]: New.
+ * gas/ia64/reloc-bad.[ls]: New.
+ * gas/ia64/ia64.exp: Run new tests.
+
2005-02-15 Jan Beulich <jbeulich@novell.com>
* gas/ia64/operand-or.d: Pass -xnone to assembler.
run_dump_test "dependency-1"
+ run_dump_test "reloc"
+ run_list_test "reloc-bad" ""
+
run_dump_test "real"
run_dump_test "align"
run_dump_test "order"
--- /dev/null
+.*: Assembler messages:
+.*:[[:digit:]]+: (Error|Warning): .* GPREL14 .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF14 .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF32[LM]SB .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF64[LM]SB .*
+.*:[[:digit:]]+: (Error|Warning): .* PLTOFF14 .*
+.*:[[:digit:]]+: (Error|Warning): .* PLTOFF32[LM]SB .*
+.*:[[:digit:]]+: (Error|Warning): .* FPTR14 .*
+.*:[[:digit:]]+: (Error|Warning): .* FPTR22 .*
+.*:[[:digit:]]+: (Error|Warning): .* PCREL14 .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF_FPTR14 .*
+.*:[[:digit:]]+: (Error|Warning): .* SEGREL14 .*
+.*:[[:digit:]]+: (Error|Warning): .* SEGREL22 .*
+.*:[[:digit:]]+: (Error|Warning): .* SEGREL64I .*
+.*:[[:digit:]]+: (Error|Warning): .* SECREL14 .*
+.*:[[:digit:]]+: (Error|Warning): .* SECREL22 .*
+.*:[[:digit:]]+: (Error|Warning): .* SECREL64I .*
+.*:[[:digit:]]+: (Error|Warning): .* LTV14 .*
+.*:[[:digit:]]+: (Error|Warning): .* LTV22 .*
+.*:[[:digit:]]+: (Error|Warning): .* LTV64I .*
+.*:[[:digit:]]+: (Error|Warning): .* IPLT14 .*
+.*:[[:digit:]]+: (Error|Warning): .* IPLT22 .*
+.*:[[:digit:]]+: (Error|Warning): .* IPLT64I .*
+.*:[[:digit:]]+: (Error|Warning): .* IPLT32[LM]SB .*
+.*:[[:digit:]]+: (Error|Warning): .* IPLT64[LM]SB .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF14X .*
+.*:[[:digit:]]+: (Error|Warning): .* TPREL32[LM]SB .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL14 .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL64I .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL32[LM]SB .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL64[LM]SB .*
+.*:[[:digit:]]+: (Error|Warning): .* DTPMOD14 .*
+.*:[[:digit:]]+: (Error|Warning): .* DTPMOD22 .*
+.*:[[:digit:]]+: (Error|Warning): .* DTPMOD64I .*
+.*:[[:digit:]]+: (Error|Warning): .* DTPMOD32[LM]SB .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPMOD14 .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPMOD64I .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL32[LM]SB .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF_TPREL64[LM]SB .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPREL14 .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPREL64I .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPREL32[LM]SB .*
+.*:[[:digit:]]+: (Error|Warning): .* LTOFF_DTPREL64[LM]SB .*
--- /dev/null
+ .global esym
+ .section .rodata, "a", @progbits
+ .text
+_start:
+ adds r1 = @gprel(esym), r0
+
+ adds r1 = @ltoff(esym), r0
+ .xdata4 .rodata, @ltoff(esym)
+ .xdata8 .rodata, @ltoff(esym)
+
+ adds r1 = @pltoff(esym), r0
+ .xdata4 .rodata, @pltoff(esym)
+
+ adds r1 = @fptr(esym), r0
+ mov r2 = @fptr(esym)
+
+ adds r1 = @pcrel(esym), r0
+
+ adds r1 = @ltoff(@fptr(esym)), r0
+
+ adds r1 = @segrel(esym), r0
+ mov r2 = @segrel(esym)
+ movl r3 = @segrel(esym)
+
+ adds r1 = @secrel(esym), r0
+ mov r2 = @secrel(esym)
+ movl r3 = @secrel(esym)
+
+ adds r1 = @ltv(esym), r0
+ mov r2 = @ltv(esym)
+ movl r3 = @ltv(esym)
+
+ adds r1 = @iplt(esym), r0
+ mov r2 = @iplt(esym)
+ movl r3 = @iplt(esym)
+ .xdata4 .rodata, @iplt(esym)
+ .xdata8 .rodata, @iplt(esym)
+
+ adds r1 = @ltoffx(esym), r0
+
+ .xdata4 .rodata, @tprel(esym)
+
+ adds r1 = @ltoff(@tprel(esym)), r0
+ movl r3 = @ltoff(@tprel(esym))
+ .xdata4 .rodata, @ltoff(@tprel(esym))
+ .xdata8 .rodata, @ltoff(@tprel(esym))
+
+ adds r1 = @dtpmod(esym), r0
+ mov r2 = @dtpmod(esym)
+ movl r3 = @dtpmod(esym)
+ .xdata4 .rodata, @dtpmod(esym)
+
+ adds r1 = @ltoff(@dtpmod(esym)), r0
+ movl r3 = @ltoff(@dtpmod(esym))
+ .xdata4 .rodata, @ltoff(@tprel(esym))
+ .xdata8 .rodata, @ltoff(@tprel(esym))
+
+ adds r1 = @ltoff(@dtprel(esym)), r0
+ movl r3 = @ltoff(@dtprel(esym))
+ .xdata4 .rodata, @ltoff(@dtprel(esym))
+ .xdata8 .rodata, @ltoff(@dtprel(esym))
--- /dev/null
+#objdump: -r
+#name: ia64 relocations
+
+.*: +file format .*
+
+RELOCATION RECORDS FOR \[\.text\]:
+OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
+[[:xdigit:]]+[012][[:space:]]+IMM14[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+IMM22[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+IMM64[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+GPREL22[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+GPREL64I[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+LTOFF22[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+LTOFF64I[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+PLTOFF22[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+PLTOFF64I[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+FPTR64I[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+PCREL60B[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+PCREL21B[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+PCREL21M[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+PCREL21F[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+LTOFF_FPTR22[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+LTOFF_FPTR64I[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+PCREL22[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+PCREL64I[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+LTOFF22X[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+LDXMOV[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+TPREL14[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+TPREL22[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+TPREL64I[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+LTOFF_TPREL22[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+LTOFF_DTPMOD22[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+DTPREL14[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+DTPREL22[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+DTPREL64I[[:space:]]+esym
+[[:xdigit:]]+[012][[:space:]]+LTOFF_DTPREL22[[:space:]]+esym
+
+RELOCATION RECORDS FOR \[\.rodata\.4\]:
+OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
+[[:xdigit:]]+[048cC][[:space:]]+DIR32[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[048cC][[:space:]]+GPREL32[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[048cC][[:space:]]+FPTR32[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[048cC][[:space:]]+PCREL32[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[048cC][[:space:]]+LTOFF_FPTR32[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[048cC][[:space:]]+SEGREL32[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[048cC][[:space:]]+SECREL32[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[048cC][[:space:]]+LTV32[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[048cC][[:space:]]+DTPREL32[LM]SB[[:space:]]+esym
+
+RELOCATION RECORDS FOR \[\.rodata\.8\]:
+OFFSET[[:space:]]+TYPE[[:space:]]+VALUE[[:space:]]*
+[[:xdigit:]]+[08][[:space:]]+DIR64[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[08][[:space:]]+GPREL64[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[08][[:space:]]+PLTOFF64[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[08][[:space:]]+FPTR64[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[08][[:space:]]+PCREL64[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[08][[:space:]]+LTOFF_FPTR64[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[08][[:space:]]+SEGREL64[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[08][[:space:]]+SECREL64[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[08][[:space:]]+LTV64[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[08][[:space:]]+IPLT[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[08][[:space:]]+TPREL64[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[08][[:space:]]+DTPMOD64[LM]SB[[:space:]]+esym
+[[:xdigit:]]+[08][[:space:]]+DTPREL64[LM]SB[[:space:]]+esym
--- /dev/null
+ .global esym
+ .section .rodata.4, "a", @progbits
+ .section .rodata.8, "a", @progbits
+ .text
+_start:
+ adds r1 = esym, r0
+ mov r2 = esym
+ movl r3 = esym
+ .xdata4 .rodata.4, esym
+ .xdata8 .rodata.8, esym
+
+ mov r2 = @gprel(esym)
+ movl r3 = @gprel(esym)
+ .xdata4 .rodata.4, @gprel(esym)
+ .xdata8 .rodata.8, @gprel(esym)
+
+ mov r2 = @ltoff(esym)
+ movl r3 = @ltoff(esym)
+
+ mov r2 = @pltoff(esym)
+ movl r3 = @pltoff(esym)
+ .xdata8 .rodata.8, @pltoff(esym)
+
+ movl r3 = @fptr(esym)
+ .xdata4 .rodata.4, @fptr(esym)
+ .xdata8 .rodata.8, @fptr(esym)
+
+ brl.call.sptk b1 = esym
+ br.call.sptk b2 = esym
+ chk.s r0, esym
+ fchkf esym
+ .xdata4 .rodata.4, @pcrel(esym)
+ .xdata8 .rodata.8, @pcrel(esym)
+
+ mov r2 = @ltoff(@fptr(esym))
+ movl r3 = @ltoff(@fptr(esym))
+ .xdata4 .rodata.4, @ltoff(@fptr(esym))
+ .xdata8 .rodata.8, @ltoff(@fptr(esym))
+
+ .xdata4 .rodata.4, @segrel(esym)
+ .xdata8 .rodata.8, @segrel(esym)
+
+ .xdata4 .rodata.4, @secrel(esym)
+ .xdata8 .rodata.8, @secrel(esym)
+
+ // REL32 only in executables
+ // REL64 only in executables
+
+ .xdata4 .rodata.4, @ltv(esym)
+ .xdata8 .rodata.8, @ltv(esym)
+
+//todo PCREL21BI
+ mov r2 = @pcrel(esym)
+ movl r3 = @pcrel(esym)
+
+ .xdata16 .rodata.8, @iplt(esym)
+
+ // COPY only in executables
+
+//todo movl r3 = -esym
+
+ mov r2 = @ltoffx(esym)
+ ld8.mov r3 = [r2], esym
+
+ adds r1 = @tprel(esym), r0
+ mov r2 = @tprel(esym)
+ movl r3 = @tprel(esym)
+ .xdata8 .rodata.8, @tprel(esym)
+
+ mov r2 = @ltoff(@tprel(esym))
+
+ .xdata8 .rodata.8, @dtpmod(esym)
+
+ mov r2 = @ltoff(@dtpmod(esym))
+
+ adds r1 = @dtprel(esym), r0
+ mov r2 = @dtprel(esym)
+ movl r3 = @dtprel(esym)
+ .xdata4 .rodata.4, @dtprel(esym)
+ .xdata8 .rodata.8, @dtprel(esym)
+
+ mov r2 = @ltoff(@dtprel(esym))
projects / binutils-gdb.git / commitdiff