build/sim/config: add default_clk/default_clk_freq parameters for retro-compatibility...

diff --git a/litex/build/sim/config.py b/litex/build/sim/config.py
index 43eeb1565c6f2cbcc8c0ddf74f99cf19bec79bb0..154cf680b9051cb9e5d6842b9d43c87e149cceb7 100644 (file)
--- a/litex/build/sim/config.py
+++ b/litex/build/sim/config.py
@@ -6,8 +6,10 @@ import json
 import math
 
 class SimConfig():
-    def __init__(self):
+    def __init__(self, default_clk=None, default_clk_freq=int(1e6)):
         self.modules = []
+        if default_clk is not None:
+            self.add_clocker(default_clk, default_clk_freq)
 
     def _format_interfaces(self, interfaces):
         if not isinstance(interfaces, list):