Fixed typo

diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v
index 40d79aeae36f0b40c93c8f0a7e6c55cf09af9b7d..706e955b698de682405460023c3900190dad56d0 100644 (file)
--- a/techlibs/greenpak4/cells_sim.v
+++ b/techlibs/greenpak4/cells_sim.v
@@ -235,7 +235,7 @@ module GP_SHREG(input nRST, input CLK, input IN, output OUTA, output OUTB);
        
        reg[15:0] shreg = 0;
        
-       always @(posedge clk, negedge RSTN) begin
+       always @(posedge clk, negedge nRST) begin
                
                if(!nRST)
                        shreg = 0;