Set UART bridge SEL signals to 0xF

diff --git a/examples/uartbridge.py b/examples/uartbridge.py
index 17a94301db9c1404f95a03e1438d86998fc9a411..747f63f6fd5ab41d6dfd0c9c8d092fc4bb1d7cd5 100644 (file)
--- a/examples/uartbridge.py
+++ b/examples/uartbridge.py
@@ -90,7 +90,7 @@ class UARTBridge(Elaboratable):
                     self.bus.stb.eq(1),
                     self.bus.we.eq(1),
                     self.bus.cyc.eq(1),
-                    self.bus.sel.eq(1),
+                    self.bus.sel.eq(0xF),
                 ]
 
                 with m.If(self.bus.ack):