Fix testsuite regression due to recent IRA changes.

	* gcc.target/arm/fuse-caller-save.c: Update expected output.

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 988d49af3b8b6e8178bce2a514cb5ccebfc4895e..3f2c2851799b67e200b19503d6d54423cf09678e 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2020-03-02  Jeff Law  <law@redhat.com>
+
+       * gcc.target/arm/fuse-caller-save.c: Update expected output.
+
 2020-03-02  Martin Liska  <mliska@suse.cz>
 
        * gcc.dg/vect/bb-slp-19.c: The comment

diff --git a/gcc/testsuite/gcc.target/arm/fuse-caller-save.c b/gcc/testsuite/gcc.target/arm/fuse-caller-save.c
index ef9256dced95a8f1ba976f7500846eaa3418ede1..20837125c0a42b861b8fd4c73af4b64f30110d1f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/fuse-caller-save.c
+++ b/gcc/testsuite/gcc.target/arm/fuse-caller-save.c
@@ -22,4 +22,4 @@ main (void)
 
 /* For thumb1, r3 is considered likely spilled, and treated differently in
    ira_build_conflicts, which inhibits the fipa-ra optimization.  */
-/* { dg-final { scan-assembler-times "mov\tr3, r0" 1 { target { ! arm_thumb1 } } } } */
+/* { dg-final { scan-assembler-times "mov\tr1, r0" 1 { target { ! arm_thumb1 } } } } */