2010-xx-xx Mingjie Xing <mingjie.xing@gmail.com>

gcc/testsuite/
2010-xx-xx  Mingjie Xing  <mingjie.xing@gmail.com>

	* lib/target-supports.exp (check_effective_target_vect_int): Return
	true for Loongson targets.
	(check_effective_target_vect_shift): Likewise.
	(check_effective_target_vect_no_int_max): Likewise.
	(check_effective_target_vect_no_align): Likewise.
	(check_effective_target_vect_short_mult): Likewise.

From-SVN: r163247

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index f1473e3d6787aaf4b2b90f6a04b158e986dd28ea..98d7b4a454f341d9d7d8572248613b7dff42d77b 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2010-08-14  Mingjie Xing  <mingjie.xing@gmail.com>
+
+       * lib/target-supports.exp (check_effective_target_vect_int): Return
+       true for Loongson targets.
+       (check_effective_target_vect_shift): Likewise.
+       (check_effective_target_vect_no_int_max): Likewise.
+       (check_effective_target_vect_no_align): Likewise.
+       (check_effective_target_vect_short_mult): Likewise.
+
 2010-08-14  Uros Bizjak  <ubizjak@gmail.com>
 
        * g++.dg/cast.C: Change fields of structures to "long" to pass

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 8385b1efc494d3587dbd79771e6657d537faab52..1f591d85ecce0a05aa48eed6138c87651738dee5 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -1620,7 +1620,9 @@ proc check_effective_target_vect_int { } {
              || [istarget sparc*-*-*]
              || [istarget alpha*-*-*]
              || [istarget ia64-*-*] 
-             || [check_effective_target_arm32] } {
+             || [check_effective_target_arm32]
+             || ([istarget mips*-*-*]
+                 && [check_effective_target_mips_loongson]) } {
           set et_vect_int_saved 1
        }
     }
@@ -2156,7 +2158,9 @@ proc check_effective_target_vect_shift { } {
             || [istarget ia64-*-*]
             || [istarget i?86-*-*]
             || [istarget x86_64-*-*]
-            || [check_effective_target_arm32] } {
+            || [check_effective_target_arm32]
+            || ([istarget mips*-*-*]
+                && [check_effective_target_mips_loongson]) } {
           set et_vect_shift_saved 1
        }
     }
@@ -2270,7 +2274,9 @@ proc check_effective_target_vect_no_int_max { } {
        set et_vect_no_int_max_saved 0
        if { [istarget sparc*-*-*]
             || [istarget spu-*-*]
-            || [istarget alpha*-*-*] } {
+            || [istarget alpha*-*-*]
+            || ([istarget mips*-*-*]
+                && [check_effective_target_mips_loongson]) } {
            set et_vect_no_int_max_saved 1
        }
     }
@@ -2643,7 +2649,9 @@ proc check_effective_target_vect_no_align { } {
        if { [istarget mipsisa64*-*-*]
             || [istarget sparc*-*-*]
             || [istarget ia64-*-*]
-            || [check_effective_target_arm32] } { 
+            || [check_effective_target_arm32]
+            || ([istarget mips*-*-*]
+                && [check_effective_target_mips_loongson]) } {
            set et_vect_no_align_saved 1
        }
     }
@@ -2833,8 +2841,10 @@ proc check_effective_target_vect_short_mult { } {
             || [istarget spu-*-*]
             || [istarget i?86-*-*]
             || [istarget x86_64-*-*]
-             || [istarget powerpc*-*-*]
-             || [check_effective_target_arm32] } {
+            || [istarget powerpc*-*-*]
+            || [check_effective_target_arm32]
+            || ([istarget mips*-*-*]
+                && [check_effective_target_mips_loongson]) } {
           set et_vect_short_mult_saved 1
        }
     }