i965/fs: Ignore compute shaders in brw_nir_lower_inputs

The commit shown below caused compute shaders to hit the unreachable
in the default of the switch block. Since compute shaders don't have
any inputs, we can make brw_nir_lower_inputs a no-op for CS.

commit 2953c3d76178d7589947e6ea1dbd902b7b02b3d4
Author: Kenneth Graunke <kenneth@whitecape.org>
Date:   Fri Aug 14 15:15:11 2015 -0700

    i965/vs: Map scalar VS input locations properly; avoid tons of MOVs.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>

diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c
index 5459ab59c1a3bc72fa4423f11360b3022ca57436..af9d0414d512bb326326ffbb90d2dcc1b1904b71 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_nir.c
+++ b/src/mesa/drivers/dri/i965/brw_nir.c
@@ -100,6 +100,10 @@ brw_nir_lower_inputs(nir_shader *nir, bool is_scalar)
       nir_assign_var_locations(&nir->inputs, &nir->num_inputs,
                                type_size_scalar);
       break;
+   case MESA_SHADER_COMPUTE:
+      /* Compute shaders have no inputs. */
+      assert(exec_list_is_empty(&nir->inputs));
+      break;
    default:
       unreachable("unsupported shader stage");
    }