radeonsi: don't set RAW_WAIT for CP DMA clears
authorNicolai Hähnle <nicolai.haehnle@amd.com>
Fri, 21 Sep 2018 16:05:19 +0000 (18:05 +0200)
committerNicolai Hähnle <nicolai.haehnle@amd.com>
Wed, 19 Dec 2018 11:01:34 +0000 (12:01 +0100)
There is never a read-after-write hazard because the command doesn't read.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
src/gallium/drivers/radeonsi/si_cp_dma.c

index 33220d9f0fa5e7110c80d4c6ae8e9d08dfb4ba3f..80673f3f5f25b83bcdb41a5aec121f1d8c843659 100644 (file)
@@ -189,7 +189,8 @@ static void si_cp_dma_prepare(struct si_context *sctx, struct pipe_resource *dst
        if (!(user_flags & SI_CPDMA_SKIP_GFX_SYNC) && sctx->flags)
                si_emit_cache_flush(sctx);
 
-       if (!(user_flags & SI_CPDMA_SKIP_SYNC_BEFORE) && *is_first)
+       if (!(user_flags & SI_CPDMA_SKIP_SYNC_BEFORE) && *is_first &&
+           !(*packet_flags & CP_DMA_CLEAR))
                *packet_flags |= CP_DMA_RAW_WAIT;
 
        *is_first = false;