radeonsi: set some VGT context registers on SI-CI

the kernel sets them, but other UMDs can change them

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index d12c89b9401c185e770257e9418f4542d96bb268..7e09c8da1a578dbe928458979d9c9e53bec1107a 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3883,6 +3883,9 @@ static void si_init_config(struct si_context *sctx)
                        vgt_tess_distribution |= S_028B50_TRAP_SPLIT(3);
 
                si_pm4_set_reg(pm4, R_028B50_VGT_TESS_DISTRIBUTION, vgt_tess_distribution);
+       } else {
+               si_pm4_set_reg(pm4, R_028C58_VGT_VERTEX_REUSE_BLOCK_CNTL, 14);
+               si_pm4_set_reg(pm4, R_028C5C_VGT_OUT_DEALLOC_CNTL, 16);
        }
 
        if (sctx->b.family == CHIP_STONEY)