rctx->context.bind_vertex_elements_state = r600_bind_vertex_elements;
rctx->context.delete_sampler_state = si_delete_sampler_state;
rctx->context.delete_vertex_elements_state = r600_delete_vertex_element;
- rctx->context.set_constant_buffer = r600_set_constant_buffer;
rctx->context.set_polygon_stipple = evergreen_set_polygon_stipple;
rctx->context.set_sample_mask = evergreen_set_sample_mask;
rctx->context.set_vertex_buffers = r600_set_vertex_buffers;
#endif
}
-void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
- struct pipe_constant_buffer *cb)
-{
- struct r600_context *rctx = (struct r600_context *)ctx;
- struct r600_resource *rbuffer = cb ? r600_resource(cb->buffer) : NULL;
- struct r600_pipe_state *rstate;
- uint64_t va_offset;
- uint32_t offset;
-
- /* Note that the state tracker can unbind constant buffers by
- * passing NULL here.
- */
- if (cb == NULL) {
- return;
- }
-
- r600_inval_shader_cache(rctx);
-
- if (cb->user_buffer)
- r600_upload_const_buffer(rctx, &rbuffer, cb->user_buffer, cb->buffer_size, &offset);
- else
- offset = 0;
- va_offset = r600_resource_va(ctx->screen, (void*)rbuffer);
- va_offset += offset;
- //va_offset >>= 8;
-
- switch (shader) {
- case PIPE_SHADER_VERTEX:
- rstate = &rctx->vs_const_buffer;
- rstate->nregs = 0;
- r600_pipe_state_add_reg(rstate,
- R_00B130_SPI_SHADER_USER_DATA_VS_0,
- va_offset, rbuffer, RADEON_USAGE_READ);
- r600_pipe_state_add_reg(rstate,
- R_00B134_SPI_SHADER_USER_DATA_VS_1,
- va_offset >> 32, NULL, 0);
- break;
- case PIPE_SHADER_FRAGMENT:
- rstate = &rctx->ps_const_buffer;
- rstate->nregs = 0;
- r600_pipe_state_add_reg(rstate,
- R_00B030_SPI_SHADER_USER_DATA_PS_0,
- va_offset, rbuffer, RADEON_USAGE_READ);
- r600_pipe_state_add_reg(rstate,
- R_00B034_SPI_SHADER_USER_DATA_PS_1,
- va_offset >> 32, NULL, 0);
- break;
- default:
- R600_ERR("unsupported %d\n", shader);
- return;
- }
-
- r600_context_pipe_state_set(rctx, rstate);
-
- if (cb->buffer != &rbuffer->b.b)
- pipe_resource_reference((struct pipe_resource**)&rbuffer, NULL);
-}
struct pipe_stream_output_target *
r600_create_so_target(struct pipe_context *ctx,
struct r600_pipe_state config;
struct si_pipe_shader *ps_shader;
struct si_pipe_shader *vs_shader;
- struct r600_pipe_state vs_const_buffer;
struct r600_pipe_state vs_user_data;
- struct r600_pipe_state ps_const_buffer;
struct pipe_query *current_render_cond;
unsigned current_render_cond_mode;
struct pipe_query *saved_render_cond;
void r600_bind_vs_shader(struct pipe_context *ctx, void *state);
void r600_delete_ps_shader(struct pipe_context *ctx, void *state);
void r600_delete_vs_shader(struct pipe_context *ctx, void *state);
-void r600_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
- struct pipe_constant_buffer *cb);
struct pipe_stream_output_target *
r600_create_so_target(struct pipe_context *ctx,
struct pipe_resource *buffer,
rctx->ps_samplers.n_samplers = count;
}
+/*
+ * Constants
+ */
+static void si_set_constant_buffer(struct pipe_context *ctx, uint shader, uint index,
+ struct pipe_constant_buffer *cb)
+{
+ struct r600_context *rctx = (struct r600_context *)ctx;
+ struct r600_resource *rbuffer = cb ? r600_resource(cb->buffer) : NULL;
+ struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
+ uint64_t va_offset;
+ uint32_t offset;
+
+ /* Note that the state tracker can unbind constant buffers by
+ * passing NULL here.
+ */
+ if (cb == NULL) {
+ FREE(pm4);
+ return;
+ }
+
+ si_pm4_inval_shader_cache(pm4);
+
+ if (cb->user_buffer)
+ r600_upload_const_buffer(rctx, &rbuffer, cb->user_buffer, cb->buffer_size, &offset);
+ else
+ offset = 0;
+ va_offset = r600_resource_va(ctx->screen, (void*)rbuffer);
+ va_offset += offset;
+
+ si_pm4_add_bo(pm4, rbuffer, RADEON_USAGE_READ);
+
+ switch (shader) {
+ case PIPE_SHADER_VERTEX:
+ si_pm4_set_reg(pm4, R_00B130_SPI_SHADER_USER_DATA_VS_0, va_offset);
+ si_pm4_set_reg(pm4, R_00B134_SPI_SHADER_USER_DATA_VS_1, va_offset >> 32);
+ si_pm4_set_state(rctx, vs_const, pm4);
+ break;
+
+ case PIPE_SHADER_FRAGMENT:
+ si_pm4_set_reg(pm4, R_00B030_SPI_SHADER_USER_DATA_PS_0, va_offset);
+ si_pm4_set_reg(pm4, R_00B034_SPI_SHADER_USER_DATA_PS_1, va_offset >> 32);
+ si_pm4_set_state(rctx, ps_const, pm4);
+ break;
+
+ default:
+ R600_ERR("unsupported %d\n", shader);
+ return;
+ }
+
+ if (cb->buffer != &rbuffer->b.b)
+ pipe_resource_reference((struct pipe_resource**)&rbuffer, NULL);
+}
+
void si_init_state_functions(struct r600_context *rctx)
{
rctx->context.create_blend_state = si_create_blend_state;
rctx->context.set_vertex_sampler_views = si_set_vs_sampler_view;
rctx->context.set_fragment_sampler_views = si_set_ps_sampler_view;
+
+ rctx->context.set_constant_buffer = si_set_constant_buffer;
}
void si_init_config(struct r600_context *rctx)
struct si_pm4_state *fb_blend;
struct si_pm4_state *dsa_stencil_ref;
struct si_pm4_state *vs;
- struct si_pm4_state *ps;
+ struct si_pm4_state *vs_const;
+ struct si_pm4_state *ps;
struct si_pm4_state *ps_sampler_views;
- struct si_pm4_state *ps_sampler;
+ struct si_pm4_state *ps_sampler;
+ struct si_pm4_state *ps_const;
struct si_pm4_state *spi;
struct si_pm4_state *draw_info;
} named;